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ADC128S052 fsclk specification

Takumi Suzuki1
Mastermind 8420 points
Other Parts Discussed in Thread: ADC128S052

Hi,

I would like to ask you a basic question about ADC128S052 fsclk spec.

The specification is as below.

I think TI garantees min 3.2MHz and max 8 MHz, so I also suppose we cannot use the frequency between 0.8MHz to 3.2MHz and between 8MHz and 16MHz.

I do not understand why there is such specification on the datasheet.

Could you tell me what situation we can use out of from 8MHz to 3.2MHz?

Thank you in advance.

Best Regards,

  • 0
    TI__Intellectual 2765 points

    Hello Takumi,

    Agreed, this specification is awkward to read.

    The way to look at it is as follows: when operating the device with Fsclk between 3.2MHz and 8MHz all devices tested by TI maintained their specified parametric performance.

    When clock rate is below 3.2MHz or above 8MHz, all devices tested were functional, however a few were found to suffer paramteric degradation beyond the specifications (say SNR decresed by 1dB beyond spec) - although nothing catastrophic.

    Clock rates below 0.8MHz and above 16MHz may result in: significant parametric peformance degradation, and/or  functional issues.

    Sincerely,

    tom  

  • 0 in reply to Tom Domanski24
    Mastermind 8420 points

    Hi Tom-san,

    Thank you very much for your clear answer.

    I understood well, thanks!

    Best Regards,