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ADS1271 Data Ready line won't go low

Other Parts Discussed in Thread: ADS1271

Hello all.

I am using a C28035 control card to talk to the ADS1271 ADC.

My issue is that the ADS1271 will not drive the Data Ready line low.  I have changed the micro's ports for the SPI bus to accept the Transfer Enable line as an input, and disabled the pull ups on it.  I have also temporarily removed the line connecting the ADC and micro such that I can verify that the micro is not holding the line high.

I have emailed the PDF of the schematics to your recommended address: pa_deltasigma_apps@ti.com


I am using this chip in SPI Format and High Speed Mode.  The respective pins are all tied high and low with wires.

My issue is with the ADS1271 not beginning the SPI transfer function by keeping the Data Ready line high.  However, I can force the pin low by briefly touching the pin to ground. 
From there, my code will transfer garbage data to the transfer buffer, and the SPI transfer is initiated. 

I don't think I'm getting actual data from the ADC SPI register however.

My clock into the ADC is 25 MHz, and my SPI clock is roughly 110 kHz.

Any thoughts why nDRDY will not go low by itself?

Thanks for your time.

-Cam Buskell

  • Hi Cam - I thought you resolved your issue in the other post. Do you still need some help with this?

    I received the email with your schematic and scope captures. I'll get back to you tomorrow with feedback.

    Thanks and regards,

    (edit) - sorry, just remembered the first post was about the /PWDN pin. :)

  • I noticed that you are calling Pin 10 of the ADS1271 "/CS" in your schematic. Make sure that you are treating this pin as an active-low input to your microcontroller.

    You mentioned that you separated the ADC and the MCU - did you only separate the line from /DRDY to the MCU input? If you remove /DRDY from the MCU and continue to provide master CLKs, I would expect /DRDY to toggle.

    Best Regards,