Hello,
I am encountering some problems with the SPI interface to the ADS1248.
SETUP:
The part ADS1248 is connected to the FPGA, so I am able to fully control timings of the interface. The interface is (normally) running at 1MHz, 50%duty cycle, there is plenty of setup/hold time. In general I am able to communicate with the converter, set-up the registers, read-back the data correctly.
The problem is when there is performed the write register (WREG) command to two registers in a row (second parameter =0x01 so two consecutive registers are being written). I am executing the write command to two registers:
0x0A (IADAC0 to select a value of a current source) and to
0x0B (IADAC1 to select a destination of a current source)
The (example) frame looks as follows (DIN pin): 0x0A 0x01 0x09 0x2F (Address, N-bytes, Data1, Data2)
PROBLEM:
The problem is that the Data2 does not (always) reach the destination (register 0x0B)
1) Readback value of that register is not the same as written (readback is a default value of 0xFF instead of written 0x2F).
2) IDAC current is not present on the component pin (Vref previously enabled). The first register 0x0A is written with the correct value.
OBSERVATIONS:
When executing two separate write commands: one to the register 0x0A and the second to the register 0x0B it works as expected.
When SPI interface runs at 1MHz, sometimes the write command gets accepted, when it runs faster then 1MHz it is never accepted
When SPI interface is slowed down to about 600kHz the double write command is accepted, (that really worries me)
Adding some idle time (tested up to 24us) between bytes does not help
SCLK signal observed using a scope (at the ADC input pin) is clean and monotonic, setup and hold times are satisfied
QUESTIONS:
Is there any restriction of witting to two registers using a single WREG command?
Thanks,
Robert
