Hi,
Currently I'm trying to use SPI to communicate to an SPI - USB bridge that interfaces with LabView. Seeing the datasheet, for SPI communications the Format [2:0] pins should be in the range of 000-010... yet, for some reason, the Format [2] pin is always in a high logic level even when not connected to the SPI-USB bridge. Seeing this, I verified that the DIP switch S2 was set downwards, so it is connected to ground, but changing the switch from up to down does not change the logic level, it is always high.. so it is always configured as Frame Sync. When I change the position of the dip switch for other pins, they work properly... so my thought was that the dip switch was malfunctioning, so I removed it, hoping to solve the issue, but the result was the same.
I've checked the schematic and the Format pins are connected to the pull-down resistance, the dipswitch and then to the ADS1278, being the dip switch the apparent connection to the IOVDD... is there another connection from the Format pin to IOVDD that I'm missing? what other reason could there be to the high logic value of that specific pin? As a last resort I'm thinking of directly connecting the Format 2 pin to DGND, as I'm not interested in frame sync comms, but I would appreciate another better solution.
Thanks