Hi,
I'am writing firmware for ADS1262 and i don't understand §9.4.4.1 of data sheet :
"When CS is high, the serial interface is reset, SCLK input activity is ignored
(blocking input commands), and the DOUT/DRDY output pin enters a high-impedance state."
and just after :
"The DRDY output asserts low when conversion data are ready and is not affected by CS."
Can i use DRDY for interrupt if CS already returned Hi state ?
thanks for your help
Hervé