Hi:
I have made ADS1256 almost working fine, except the self calibration.
First, I was to confirm:
1. I use AIN2 as AINP and AIN1 as AINN, is that correct? They are adjacent inputs, datasheet page 14.
2. I use 2 ADS1256s, which share SCLK, DIN, DOUT and VREF, other function pins DRDY and CS are seperatly controlled.
The VREF circuit follows what in the datasheet fig. 16, except that 1 OPA350 drives 2 ADC parts, with 100+47uF titan capacitors, without 49.9ohm resistor. The circuit is the same with EVA board, but 1 OP drives 2 ADCs.
Can they run correctly?
3. The init sequence 5 second after power up is:
Wait for DRDY=0;
Send Command RESET; wait for DRDY=0;
Send Command SDATAC; wait for DRDY=0;
Write Reg STATUS 0x02, for ACAL OFF, BUFFER ON.wait for DRDY=0;
Write Reg MUX 0x21, for AINP=AIN2, AINN=AIN1;wait for DRDY=0; (AINP=AIN0, AINN=AIN1 for the second part)
Write Reg ADCON 0x22, for SDCS OFF, PGA=4;wait for DRDY=0; (PGA=16 for the second part)
Write Reg DRATE 0x63, for 50SPSwait for DRDY=0;
Write Reg IO 0x01;wait for DRDY=0;
Send Command SELFCAL;wait for DRDY=0;
For each ADS1256, init sequence above is used. Is this sequence right?
And, here are the phenomenan:
1. SELFCAL result changes.
Each time when ADS1256s are powered up, and, after about 5 second, initialized one by one, I read back the OFC and FSC registers, they will change each time.
I notice that FSC will change if OFC changes, and with same OFC values, FSC varies little, about 4-6 LSB.
For the first part, I find some OFC values usually appear, say FFEF1F and FFEFBF, by chance, which affact the reading. Other values are near around these 2 values, but there are some other values, even they are not usually occur.
At first, I doubt that the power up procedure will affect the self calibration, i.e. the reference voltage and supply voltage. So, I program the MCU to init the parts every 5 second following the above init sequence, and then read OFC and FSC registers, a long time after power on. The phenomena is same.
And I also find that with time passed, after periodically init, OFC changes much, say from FFEF1F and FFEFBF to FFECA3 and FFED3F, about 636 LSB or 0x027C, but the difference of usually occuring values is about 160 LSB, or 0xA0.
2. ACAL turn on
Then I turn on ACAL in STATUS register, after power up, both of them refuse to change DRATE to 4, it remains 30k, so I think other settings do not work too.
Initialization every 5s also has no effect. Thet still output DRDY at 30kHz. In every 5s init, OFC and FSC also change, say OFC=FFFFFF or FFF120 or some other values, FFFFFF appears more, I think these values are of no sense since the DRATE is wrong.
3. SELFCAL when short input terminals
So, I have to use SELFCAL command to calibrate them, but this time I short the input terminals, because I think input signal will disturb the calibration procedure, the phenomena is similar. OFC changes to FFEF1F or FFEE7F. And I find that the reading is not near 0 or FFFFFF, it is FFFCxx. So calibration seems not work correctly.
4. SELFCAL on unused inputs
Calibration is to connect input to VREF and 1/2VDD internally, input signals will not disturb calibration in theory. Even so, to avoid any disturbing, I use unused floating inputs for calibration, say AINP=AIN6 and AINN=AIN7, phenomena is similar, but OFC=FFEF1F occurs more.
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Why the OFC alters after SELFCAL command, and at the same time, short input readings are not near 0, even with floating input terminals? And why OFC havs some fixed values.
Why the OFC changes so much, 636 LSB is not acceptable in my circuit.
Why ACAL does not work? Are there any operations not correct in Init procedure?
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I have monitered and waited for DRDY falls to 0 before and after every operation, including RREG, WREG, RDATA, SDATAC, SELFCAL, RESET, to start the next operation.
I can read readings, write and read registers correctly, except ACAL ON.
I have seperated analog and digital ground, and confirmed no jitter or digital current in analog ground. The deltaV between these two ground planes is lower than 100uV, measured by K2000 in fast mode with filter off.
I have seriously dealt with signal and ref tracks, and they work well. The parts now work very well if I ignore the offset and gain error (I think FSC is correct, but OFC is not), and they can almost reach the specifications in datasheet.
Because I ever wanted to use SYNC/PWDN and RESET (but I ignored t16 ^-^), these 2 pins are not directly connected to 3.3V VDD, but output terminals of a 74HC14, but they are set HIGH levels by MCU, immediately after power up, about 5s before init procedure begins.
Digital signals are isolated by several optocouplers of HCPL-M611, and I have check the waveform, they works correctly.
And I was some confused by the datasheet. The information "the part will enter RDATAC state after power up" is not mentioned, and the formula (3) in page 24 has no clear statement, I cannot calculate the correct output from the formular with OFC and FSC. I would also like to suggest that an offical init procedure can be provided in the latest datasheet, I found so many problems about inits in the forum.
regards.