DAC7716 outputs on power up are wrong and cannot be changed

Hi Joe,

Apologies for the delay through the holidays.

I have a few questions that will help me debug this issue.

• What supplies are you using?
• What is the load at the output?
• What is the SPI code that you are using to update the outputs?
• Are you following the power-supply sequencing described in page 22 of the DAC7716 datasheet?
• Can you share the schematic? If you would rather share any of the information through email, is it okay to contact you to your E2E registered email?

>>>What supplies are you using?

I have an Agilent E3634A for 3.3V and an HP E3631A supplying +5V & +/-15V.

>>>What is the load at the output?

Which output?

>>>What is the SPI code that you are using to update the outputs?

Here's my code of the function interacting w/the device:

void DAC7716_D2A_Testing( SpiChannel spiChn )
{
    Dac7716_ShiftReg_t TxCmd, RxCmd, MonitorCmd;

    lStatus_t portValue;

    uint32_t  result; // data is only 10 bits, but the read returns a 24 bit value
    uint16_t  D2Adata[ BD_D2A_OUTPUT_CHAN_MAX - BD_D2A_OUTPUT_CHAN_NONE - 1 ]; // Normalize it, then subtract 1 to get the proper size

    int i,j;

    for ( i = 0; i < BD_D2A_OUTPUT_CHAN_MAX - BD_D2A_OUTPUT_CHAN_NONE - 1; i++ )
    { D2Adata[i] = 0; } // zero it out

    TxCmd.u.cmdReg.Rsvd_bits       = 0; // LSB
    TxCmd.u.cmdReg.GainCh0_bit     = GAIN_BIT_OF_2X;
    TxCmd.u.cmdReg.GainCh1_bit     = GAIN_BIT_OF_2X; //                        - 0

    TxCmd.u.cmdReg.GainCh2_bit     = GAIN_BIT_OF_2X;
    TxCmd.u.cmdReg.GainCh3_bit     = GAIN_BIT_OF_2X;
    TxCmd.u.cmdReg.NOP_bit         = 0; // default
    TxCmd.u.cmdReg.DisableSDO_bit  = DSDO_BIT_ENABLE_SDO; //                   - 0

    TxCmd.u.cmdReg.Gpio0Status_bit = GPIO_BIT_OUTPUT_HIGH_Z;
    TxCmd.u.cmdReg.Gpio1Status_bit = GPIO_BIT_OUTPUT_HIGH_Z;
    TxCmd.u.cmdReg.Rsvd_bit        = 0; // default
    TxCmd.u.cmdReg.PwrDnB_bit      = PDA_BIT_DAC0_AND_1_NORMAL_OPERATION; //   - 3

    TxCmd.u.cmdReg.PwrDnA_bit      = PDA_BIT_DAC0_AND_1_NORMAL_OPERATION;
    TxCmd.u.cmdReg.SwRST_bit       = RST_BIT_DONE;
    TxCmd.u.cmdReg.LD_bit          = LD_BIT_DONE;
    TxCmd.u.cmdReg.A_B_bit         = AB_BIT_RD_INPUT_DATA_REG; //              - 0 , MSB
    

    /***************                INIT                          **************/
    TxCmd.rdWrN   = DAC_WR;
    TxCmd.regAddr = DAC7716_SPI_CMD_REG_SEL;

    // Initial test will be just to try and read the cmd register
    RxCmd.rdWrN   = DAC_RD;
    RxCmd.regAddr = DAC7716_SPI_CMD_REG_SEL;


    /************        WRITE THE COMMAND REGISTER                   ***********/
    DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
    DD_uC_SpiChnPutS( spiChn, /* Tx buff */(uchar_t *)&TxCmd );     // 24 bit write
    SpiChnGetRov(spiChn, /* clear */ true);
    while ( SpiChnIsBusy( spiChn ) );
    DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW

    /************        READ THE COMMAND REGISTER                   ***********/
    // The first read queues up the data to go out w/the next read
    DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
    DD_uC_SpiChnPutS( spiChn, /* Tx buff */(uchar_t *)&RxCmd ); // 24 bit write
    SpiChnGetRov(spiChn, /* clear */ true);
    while ( SpiChnIsBusy( spiChn ) );
    DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW

    // The second read reads the data
    DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
    result = DD_uC_SpiChnPutC( spiChn, /* Tx buff */(uchar_t *)&RxCmd );
    SpiChnGetRov(spiChn, /* clear */ true);
    while ( SpiChnIsBusy( spiChn ) );
    DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW


    // Next test will be to output data to each channel and then read it back
    // We can measure the outputs on a scope and we should be able to compare the read value vs the write value
    // Note, the default gain is x4.  And the calibration (zero) registers default to 0.
    TxCmd.rdWrN               = DAC_WR;
    TxCmd.regAddr             = DAC7716_SPI_DAC_CH0_REG_SEL;
    TxCmd.u.inputDataReg.data = 0;

    RxCmd.rdWrN   = DAC_RD;
    RxCmd.regAddr = DAC7716_SPI_DAC_CH0_REG_SEL;

    RxCmd.rdWrN   = DAC_RD;
    RxCmd.regAddr = DAC7716_SPI_DAC_CH0_REG_SEL;

    // enum DAC7716_SPI_MONITOR_REG_SEL { HI_Z = 0, AIN = 1, DAC0 = 2, DAC1 = 4, DAC2 = 8, DAC3 = 16 };
    MonitorCmd.u.monReg.chanToMonitor = AIN;
    MonitorCmd.regAddr                = DAC7716_SPI_MONITOR_REG_SEL;
    MonitorCmd.rdWrN                  = DAC_WR;
    
    for ( i = 0; i < 4; i++ ) // 4 increments of the data
    {
        /************        WRITE THE DATA REGISTERS             *************/
        for (int j = 0; j < 4; j++) // 4 D/A channels
        {
            DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
            DD_uC_SpiChnPutS( spiChn, /* Tx buff */(uchar_t *)&TxCmd ); // 24 bit write
            SpiChnGetRov(spiChn, /* clear */ true);
            while ( SpiChnIsBusy( spiChn ) );
            DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN );

        } // for (int j = 0; j < 4; j++)

        /*************        READ ONE DATA REGISTER             **************/
        DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
        DD_uC_SpiChnPutS( spiChn, /* Tx buff */(uchar_t *)&RxCmd ); // 24 bit write
        SpiChnGetRov(spiChn, /* clear */ true);
        while ( SpiChnIsBusy( spiChn ) );
        DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW

        DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
        result = DD_uC_SpiChnPutC( spiChn, /* Tx buff */(uchar_t *)&RxCmd );
        SpiChnGetRov(spiChn, /* clear */ true);
        while ( SpiChnIsBusy( spiChn ) );
        DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW

        TxCmd.u.inputDataReg.data += 1365; // Increment 1/3 scale to go from 0, 1/3, 2/3, full scale


        /***************         CHANGE THE VMON PIN             **************/
        DD_uC_portPinClr( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW
        DD_uC_SpiChnPutS( spiChn, /* Tx buff */(uchar_t *)&MonitorCmd );
        SpiChnGetRov(spiChn, /* clear */ true);
        while ( SpiChnIsBusy( spiChn ) );
        DD_uC_portPinSet( LASER_CMD_D2A_CS_PORT, LASER_CMD_D2A_CS_PIN ); // Active LOW

        // enum DAC7716_SPI_MONITOR_REG_SEL { HI_Z = 0, AIN = 1, DAC0 = 2, DAC1 = 4, DAC2 = 8, DAC3 = 16 };
        switch ( i )
        {
            case 0:
                MonitorCmd.u.monReg.chanToMonitor = DAC0;
                break;
            case 1:
                MonitorCmd.u.monReg.chanToMonitor = DAC1;
                break;
            case 2:
                MonitorCmd.u.monReg.chanToMonitor = DAC2;
                break;
            case 3:
                MonitorCmd.u.monReg.chanToMonitor = DAC3; // Won't do anything since we'll exit the for loop now
                break;
            default:
                break;
        } // End switch ( i )
    } // End for ( i = 0; i < 4; i++ )
}

>>>Are you following the power-supply sequencing described in page 22 of the DAC7716 datasheet?

The 3.3V is powered up first, and then the +5V & +/-15V comes up together.

>>>Can you share the schematic?

Here's the device...I hope cut & paste works for graphics:

>>>If you would rather share any of the information through email, is it okay to contact you to your E2E registered email?

Absolutely.

Thanks,

Joe B.

The schematic of the device didn't appear in my post above...how can I include the schematic?

I got another power supply to supply the +5V to test the power up sequence. +3.3V on first, followed by +/-15V and then the +5V....no change.

Hi Joe,

In order to attach the schematic, you must go into rich formatting and attach the image.

Okay, lets see if this works...

Still no image....I attached the entire schematic...hopefully it gets properly attached and you can open it (pdf)

-schematic taken down per customer request-

Howdy Joe,

I'm currently assisting Eugenio with this post. Thank you for the attached image, I will look into the pdf with the previous posts and get back to you as soon as I can.

Thank you,
Matt

Howdy Matt,

I wasn't sure it worked....firefox froze up when I tried to open the attachment from the web page...so I'm glad it worked for you.
The DAC is on sheet 11, and there have been some corrections to this circuit, as follows: 1) The UNI/BIP lines are now pulled up to +3.3V, 2) LDACN was changed from a pullup to a pulldown (the hw designer connected the RSTN & LCACN lines to the FPGA just in case, but the FPGA has no functionality regarding the DAC).

Joe B.

It looks like you missed my post that proceeded your response above. I made a couple of fixes to the design: LDAC is always low now, and the UNI/BIP is always high. The FPGA has no involvement w/this DAC.

Our desired output from the DAC is 0 to 5V.

The voltage issue you mentioned I brought up to the hw engineer who designed this board just before I went on vacation (and forgot about it until you mentioned it....I guess a few buckets of Coronas and the Caribbean does that to you :-)...but he never responded. I pointed out that the data sheet (pg 20) specifies that "AVSS must not be greater than –4.75V" and that GND sounds higher than that.

Thanks,

Joe B.

Thanks Matt. Have a great vacation. Can you email me on my email that you have on file?