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DAC8812, communication issue

Other Parts Discussed in Thread: DAC8812

Dear TI,

On one of our old product, we are now using the DAC8812 (we were using AD5545 for many years). However, sometimes we have communication issues with the TI's DAC. We notice the problem by measuring the output level of more than 10mV of offset error (around 6-7 LSB).

If we use the IC in a reduced system, everything is working perfectly. When we are using a normal configuration on the same system, we have a problem on about a third of the IC, and always in the B Channel. The problem does not always occurs at the same IC's location from one board to the other. We tried to swap a 'good' and a 'bad' IC and the problem followed the 'bad' IC. We tested with a few systems and it is always the same behavior.

For debugging purpose, we reduced the SPI speed from 50 MHz to 25 MHz to ensure a respect of the hold and setup time. We measured the signals and the levels are above 3V for an '1' and below 0.3V for an '0'. The timing is good (>17ns of hold and setup) and the data are correct. We didn't notice differences when we were using the reduced system or the normal system.

The power is a clean 5V and we only notice a drop of 20mV when we were using the normal system. Noise level is good. The reference voltage is exactly the same (<0.5mV) between the systems' options.

Finally, when we momentarily shorted the DAC 5V power supply when SPI was working, we found that the IC is now working perfectly in all systems. It seems that breaking something in the IC solves the problem.

Does a weakness exists in the DAC design?

Is it only a bad batch of IC that I got?

Is it safe to ship IC that have been momentary shorted and is now working has expected, to our customers if we don't care about ESD?

Thank you

Francois

  • Hi Francois,

    I have a couple of questions. Apologies for the delay. I didn't receive a notification.

    Francois Lemieux said:
    If we use the IC in a reduced system, everything is working perfectly.

    I'm not sure what you mean by "reduce system" is this the 25 MHz SCLK?

    Francois Lemieux said:
    Does a weakness exists in the DAC design?

    This kind of problem has not been reported yet, and we have no reason to believe that this is inherent to the design.

    Francois Lemieux said:
    Is it only a bad batch of IC that I got?

    We will have to investigate this further in order to be able to tell.

    Francois Lemieux said:
    Is it safe to ship IC that have been momentary shorted and is now working has expected, to our customers if we don't care about ESD?

    No. This is not safe. We don't want to send devices to our customers that have received ESD damage. This gives us a bit of hint to debugging the issue.

    Can you share with us an oscilloscope capture of the normal system? I am going to try to replicate this in our lab.

    Have you only found a single device with this issue? Can you send me a picture of the top markings on this device? If possible I would also like to test this device myself and send it to the failure analysis lab.

  • Hi Eugenio,

    I create a block diagram of the system. The reduced system is when we remove the 16xADC Card and leave the 16xDAC Card. We did most of our test at 50 MHz, but the problem persist at 25 MHz.

    SPI interface, reduced and normal system are identical:

    We have tested 40 IC (80 DAC channel), and around a third of the B-Channel has the problem.

    The marking of the faulty IC on 2 cards are:

    DAC8812 / 51VG4 / Z22F

    DAC8812 / 4CVG4 / Z012

    DAC8812 / 48VG4 / Z22P

    Best Regards,

    Francois