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ADS131A04 CRC problem

Junghwan Lee
Prodigy 50 points
Other Parts Discussed in Thread: ADS131A04

I don't have any problem with ADS131A04 except CRC function.

My ADS131A04 is set to

Asynchronous interrupt mode (M0, High)

32bit Device word length (M1, High)

Hamming code word validation OFF (M2, Low)

Dynamic Farme size

CRC mode 0

Here is my part of command sequence.

Command: 0x4C 3D 00 00 (WREG command for CRC enable), Response: 0x2E 4E 00 00 (0x0E resgister)

Command: 0x00 33 00 00 18 35 00 00(Wake up command with CRC word), Response: 0x2C 3D 00 00 00 00 00 00 (0x0C resgister)

Command: 0x05 55 00 00 8D BB 00 00(Lock command with CRC word), Response: 0x22 21 00 00 00 00 00 00 (0x02 resgister, Fault SPI & DIN check)

I calculated CRC value with On-line CRC calculator.  

(CRC-CCITT, polynom is 0x1021, Initial value is 0xFFFF)

Does anyone  know what the problem is?

Can I get command example with CRC word? or any advice?

Thank you for your attention.

  • 0
    TI__Mastermind 38745 points
    Hello Junghwan,

    I also calculated the CRC that you sent to the device. Can you capture the SPI transaction with an oscilloscope or logic analyzer? Please include at least SCLK, MOSI, CS, and DRDY.

    Regards,
    Brian Pisani
  • 0 in reply to Brian Pisani
    Prodigy 50 points

    Hi Brian,

    Thanks for your reply.

    I captured wake up command and CRC. (0x00 33 00 00 18 35 00 00)

    2nd picture is MSB 32 bytes  (0x00 33 00 00)

    C1: SCLK, C2: MOSI, C3: CS, C4: DRDY

    Best regards,

    JungHwan

  • 0 in reply to Junghwan Lee
    TI__Mastermind 38745 points
    Hello JunHwan,

    The SPI signals look very noisy. Do you think its possible that the ADS131A04 is latching the wrong bit because communications are actually getting corrupted? Is it always the same command that doe not work? I was hoping to see the LOCK command in detail. If you could capture that we could examine it more closely.

    One thing you may want to try: if you disable CRC, is the command response correct? I'm not suggesting you don't use CRC in your design, I just mean to do this as a test to determine where the error is occurring.

    Regards,
    Brian Pisani
  • 0 in reply to Brian Pisani
    Prodigy 50 points

    Hello Brian

    Thank you for your advice.

    However, I already checked CRC disable option.

    When CRC disabled, SPI response and ADC channel data are correct.

    It is always the same command and response that does not work with CRC mode.

    So, I'm afraid it's not SPI corruption problem and that's the why i doubted CRC calculation.

    Regards,

    JungHwan Lee

  • 0 in reply to Junghwan Lee
    TI__Mastermind 38745 points
    Hey JungHwan,

    I think I might know what is going on. So you are in dynamic frame mode, but with the ADCs enabled so you will have to provide SCLKs for all the channels in addition to the status and CRC words. My hunch is that the CRC error is being set in addition to an error in the STAT_S register simply due to the fact that the number of frames being sent is not enough. Can you try sending more frames to verify this?

    Brian
  • 0 in reply to Brian Pisani
    Prodigy 50 points

    Thank you Brian.

    Your hunch is right!

    Here is my new command.

    Command: 0x00 33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 18 35 00 00(Wake up command, 16 dummy bytes and CRC word)

    Thank you again Brian!