Negative Voltage Spikes on DAC8871 output

Hi Kevin,

Thanks for the reply. I am attaching two images of voltage outputs - one zoomed in and other zoomed out. DAC code sent in these cases around 0mV [i.e. I am taking an ADC output and sending to DAC via FPGA, I have seen and observed ADC output through out long on Chipscope of xilinx FPGA and have also stored on PC so ADC output is perfectly fine, no glitch there] 

You will find negative going spike [I suspect Max carry glitch but why for so long and so high, should be within 500mV] sometimes and sometimes not. In the zoomed in pic showing only one pulse I find these spikes sometimes ending quickly within 500ns and sometimes extending. SPI Interface timing I have seen is ok.

Again this problem is not there at all voltage levels but very selective, at some these spikes are not there, somewhere they are very tiny and voltage such as 0V 1.25V etc. they are big one.

I am sending DAC output @ 20uS [I was sending @ 1uS but then there is lot of disturbance].

What do you suspect. I am purposefully sending the schematic as you may get confused with lots of info in one shot. Again, if you think schema is required after all this, i will send in the next post.

Further, I just want to know one thing as to whether Max carry glitch can be so high, can they accumulate and go even higher. Please help, client visit tomorrow.

Dear Kevin,

I think I have to give you the schematic, I have found an issue as I find similar spikes on the reference voltages as well -> TP47 and TP-48. I think I have made some mistake in connecting references of DAC and the taking DAC output as buffer. Here is the schema snapshot, please tell me. I am not using strobe terminal of AD584.

Can I simply avoid the buffering of AD584 outputs and short them directly to VREFH-F/S together. Is buffering of references causing problem or is that way VOUT is buffered is causing problem. Please let me know. Need your help in this.

Regards

I'm glad to hear that adding the capacitors to the reference pins solved the problem.  Major carry glitch of ~100mV is more inline with the datasheet curves.  Please let me know if you have any more questions.

Hi Paul_Frost

There are a few doubts that I have :-

When I connect OP4277 outputs as per Figure 40 in datasheet:- 10uF, 1kohm, 10uF combination from Left to Right as in the figure.

1) I get almost same performance as in datasheet where major carry glitches ranging from 100mV to 500mV and die within 100uS. How can I smooth these glitches within the scope of my schematic?

2) I find OP4277 getting very hot specially when giving -10V output although nothing catastrophic happens - but why so hot [Am i doing something terribly wrong here in this combination]???.  IF NOT, then what can be better choice of OPAMP - Will OP4227 be better, will it not require filtering as shown in EVM [due to better drive] or whether some better OPAMP can be suggested from you?

waiting for a revert from your side.

Regards

As far as reducing glitch is concerned, please take a look at this article which describes a few strategies. 

DAC Essentials: Glitch-be-gone

You could also evaluate the resistor in the feedback loop of the DAC buffer.  Consider changing the value to more closely match the DAC's output impedance.  Figure 39 in the DAC8871's datasheet shows this.

The OPA4277 temperature is a cause for concern, ensure that there is enough headroom on the supplies as well as verify that none of the OPAMPs are operating in the rail, though I do not see anything obviously wrong in your schematic.

Hi Paul_Frost,

Thanks for the guide. I will go through it.

I will check the rail thing. Can you suggest me on unused opamp in the schematic - thing1 .

Further heating has started only after adding decoupling caps on the REF inputs of DAC as I have told you- why will this be so? Any idea. If no decaps on REF inputs, there is spike but no heating. If decaps at the ref, heating but no spikes - why can this be? I hope i have cleared this.

regards.