DAC7811: 0 to 5V Output Schematic

I found a paper from Texas Instruments named "Sample & Hold Glitch Reduction for Precision Outputs Reference Design" (www.ti.com/.../tidu022.pdf). On page 35 and 36 it describes the reason for the glitching in R-2R DACs. It says "the main parasitic capacitors affecting output performance are the gate-to-drain capacitances, Cgdn and Cgdp". How important are the internal "A" and "/A" signals compared to VRef at charging and discharging those parasitic capacitances?

Thanks and regards,

Greg

Hi Kevin,

Thanks for joining the discussion and offering your experience.  I'm sorry it has taken so long to reply.  The past few days have been really busy for me and I haven't had the time to give this the careful thought it requires.  I'll start by stating the conclusion I came to after writing this reply.  Then I'll follow it with things I thought about before I came to this conclusion.

Unless I'm mistaken, you were not comparing shunt references to 3-terminal references.  You were probably comparing a circuit that used something like a REF5050, with and without a buffer op-amp.  I am thinking that the answer to my question is that a LM4050-N-Q1 will work fine without a buffer if the performance of that reference is adequate.  Since the REF5050 is a 3-terminal device, a buffer would be needed in order to turn it into a negative reference by creating a virtual ground.  But in the case of the reference design of Figure 33, the buffer could be optional since the REF5050 is used as a positive voltage.

I've been thinking about the things you said, and one realization that I came to is that I think about things digitally, since that is mostly everything I've worked on in my career.  In digital electronics, a clock event happens and the bypass capacitors do their thing and then they charge up in time for the next clock event.  But in electronic circuits that convert digital signals to analog, there is life between clock events.  If the DAC requires charge on the VRef input due to the rollover glitch event, charge will come from the bypass capacitor (assuming the glitch involves VRef), but then the reference needs to resupply the capacitor with charge.  In the meantime, VRef has drooped and the analog output from the DAC will have changed.  More capacitance will make the droop less pronounced.  In a digital system it doesn't matter what happens to the supply as long as all of the digital signals retain their proper state.

I looked at the transient performance of the REF5050, and the graphs in the data sheet show a relatively small spike in the output for a step change in current.  Interestingly, the output voltage spike is lower for a larger spike in current demand, suggesting that a short-lived (but high amperage) glitch event in the DAC would be handled fairly well by a REF5050 with generous capacitance on its output.  But the time scale in those graphs is 20 us per division, so perhaps the voltage spike is larger than the graph shows.  In one graph the spike is off the chart.  The DAC7811 glitch event is on the order of 100 ns long, which is quite a bit shorter than what can be seen in the chart.

I'm still unsure about what drives the glitch event most.  Is it an internal issue with driving the parasitic gate-to-drain capacitances?  Or is it because of limitations of VRef?  If it is internal, then there isn't much that can be done about it, short of choosing a different DAC or employing a sample and hold circuit.  If it is VRef, then I suppose more capacitance would soften the blow, or perhaps a very fast amplifier could deliver charge continuously.  My initial inclination was that nothing would be faster than the low impedance of a bypass capacitor, but now I see that a very high-performance amplifier is functional into the hundreds of MHz.

The graphs in the various DAC datasheets for the midscale voltage glitch do not state the value of VRef.  Is that because the glitch produces the same amount of current independent of the magnitude of VRef?  If so, would that mean glitches would be larger percentage-wise for lower values of VRef?

I'm just learning about references, so I didn't know there was so much difference in performance between the REF5050 and LM4050-N-Q1.  In looking at the data sheets, it appears the LM4050-N-Q1 shunt reference generates more noise than the REF5050.  But the noise specs aren't apples to apples, since the LM4050 is specified from 10Hz to 10kHz, and the REF5050 from 0.1Hz to 10Hz.  A graph in the LM4050 data sheet shows the noise is worse below 1 Hz, and better at higher frequencies.  I couldn't find any data on high frequency noise in the REF5050 datasheet, though it does say that the TRIM/NR pin can be connected to a 1uF capacitor, which forms a low pass filter with a couple of internal resistors.  Does that mean high-frequency noise is much lower when the noise reduction capacitor is used?

The variance over temperature (assuming I interpreted the data sheets correctly), appears to be +/- 22mV for the 5V LM4050-N-Q1, compared to about 1.5mV for the REF5050.  Thus for a 12-bit DAC with VRef at 5V, the drift over temperature for the LM4050 is about 4 LSB's, compared to about 1 LSB for the REF5050.

I can see that the proper choice of reference is very application dependent.  In my application, high speed and settling time is important.  DC accuracy is not as important, though I will have to give some thought to the accuracy over temperature aspect.

Please correct anything I said that doesn't make sense.  I've been struggling to understand this, though it seems more clear to me now.  There are definitely tradeoffs here depending upon the application.

Regards,

Greg