CCS/ADS1299: ADS1299

Hi, Brian,

Thank you for your answer. 

1, Every time after power-up function I will update the two ADS register values. 

2, I solved the register read problem by using power up function twice in sequence.

3, Now I found a new problem: 

After power up, I read the register values from the two ADS and then I begin to read data continuously (I use a function generator to input a 10Hz sine wave). I set up the SPS to 1k/s, however, the data I read out showed that sps were only 250/s. 

I have another vision of ADS board which has two ADS on it. Both the two ADS use internal clk and I can read data correctly (1k sps) from them.  

So, it seems that if using one ADS to drive the other I must make some mistakes somewhere. 

First, why I need power up function twice in sequence?

Second, why the sps is not right?  

Thank you.

Hello Jerry,

Why do you have to write the registers twice? Once the device has been totally powered up and is ready for configuration, simply write the registers to the desired configuration and then begin collecting data.

On the board where the data rate is not correct, can you read the CONFIG1 register and it shows the device is configured to be sampling at 1 kSPS? If it is, check the data rate by probing the DRDY signal with an oscilloscope and verify the frequency. If it is not, check the SPI signals using a scope or logic analyzer while you write the register and check that you are writing the data correctly.

If you want me to check the clocking scheme, please post a picture of your schematic.

Regards,
Brian

Hi, Brian,
1, How can I know if the devices has been powered up?
The whole process is this:
(1) disable CS0 and CS1 of the two ADS

(2) reset = 1 for 1s and then reset pulse is given
(3) enable CS0 and write register values to ADS_0 to set up sps to 1k/s. disable CS0
(4) enable CS1 and write register values to ADS_1 to set up sps to 1k/s. disable CS1

(5) read register values from both ADS to check sps setting.
(6) read data continuously from both ADS.

Here (2)(3)(4) are power up function.
In (5) I can get Conifig1 and sps is 1k as I write. I verify the clock (out from ADS_0 and drive ADS_1). it is not very clear and many noises modulated on it. It is hard to determine its frequency.

Then I try to disable clk out from ADS_0 and still face the same problem, which confused me a lot. Since I disable clk out, I only use ADS_0 why I still face this problem?
1, I would like to know the input resistance of clk pin when ADS_1 is set to use external clk input.
2, if ADS_1 clksel pin is float what is the input resistance of its clk pin.
Thank you.
Jerry

Hi, Brian,

Please see the schematic. Is that ok I connected clk directly without any buffer or filter?

Best

Jerry

Hi, Brian,

Thank you for your reply.

Here is the update.

1, Now I use only one ADS. CLKSEL is connected with Vdd.

2, I follow the power up sequence given in the datasheet.

3, I write register values to it to set its sps at 1k/s. CLK_EN = 0.

4, I read out register values (CONFIG1 = 212).

5, I read data continuously. The sps is about 225/s rather than 1k. The sclk from msp430 is set to 8MHz.

6, I test CS and DRDY. Both of their frequency are about 225Hz. I also test the clk of ADS and it was 2.05MHz.

Here is my question.

It seems that the hardware of ADS board has some problems which make the sps become 225/s. What do you think about it?

By the way, very occasionally, one time, when I held the board with my hands, the DRDY frequency was 1k when I tested it.

Best

Jerry

Hey Jerry,

What is the value you read from CONFIG1 in hex? Are you able to write other registers correctly? For example, you can write to the GPIO register and check that the level corresponds to the value in the GPIO register.

Brian

Hi, Brian,

Right now we found the problem that copper ground was not connected well on the PCB. 

This made the start and CS signals interference each other.

Thank you for your help.

I will update when I get a new problem.

Best

Jerry