CCS/ADS1291: SPI Comm Problem with ADS1291.

Ferhat Bayir

Part Number: ADS1291

Tool/software: Code Composer Studio

I have my own design with ADS1291.

By default DRDY pin has signal, also there is some data on DOUT pin. If i STOP Convertion with making START pin Low DOUT make nothing.

These are only things normal.

The problem is SPI comm. I cant read any thing. Im see signal true at DIN, CLK, CS pins. But no response.

Also i cant make STOP Convertion from registers or by sending SDATAC command. ADS do get register wirte commands.

For example i can see 0x20 0x00 0xFF (dummy for read) on DIN pin, and CLK CS seem fine but no response from DOUT.

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I use internal oscillator.

I tried to make CLK output with Config2 Register CLK_EN but ADS didnt get it. No Clk output. So I think, cant write to registers.

SPI Clk is 480kHz

VSS = GND,

VREFP is 0V ( is it a problem ?? )

VCAP2 = 5.35V

VCAP1 = 1.36V

over 6 years ago

0 Ferhat Bayir over 6 years ago

Intellectual 290 points

CLK -- CS

----------------------------------------------------------------------------------------------------------------------

DIN -- CS

20 -- 00 -- FF for reading register add 00h

0 Brian Pisani over 6 years ago in reply to Ferhat Bayir

TI__Mastermind 38745 points

Hello Ferhat,

Your communication protocol looks valid. Can you share the schematic?

Brian

0 Ferhat Bayir over 6 years ago in reply to Brian Pisani

Intellectual 290 points

Hi Brian, thanks for help.

AFE_START, AFE_RST, AFE_DRDY >> To CPU GPIO

0 Ferhat Bayir over 6 years ago in reply to Ferhat Bayir

Intellectual 290 points

Dear Brian
Do you have any suggestion.

0 Brian Pisani over 6 years ago in reply to Ferhat Bayir

TI__Mastermind 38745 points

Hello Ferhat,

Is pin 24 connected to ground? The image shows that it is not, but I suppose it could have just been cropped out. Make sure that PWDN/RESET is held high and that, if CLKSEL is low, there are clocks being sent to the device on the CLK pin. In your last post, you were talking about CLK. In that case, did you mean the device master CLK or the interface SCLK?

Brian

0 Ferhat Bayir over 6 years ago in reply to Brian Pisani

Intellectual 290 points

Hello Brian
1. Pin 24 is connected to GND, Also Heat Tab under IC connected too as pin 33. I deleted by mistake.
2. ClkSel Concted to VCC with 10K and Internal osc. should work.
3. 480kHz SPI Clk frequency, i tried lover values.
4. PWDN is high, connected to MCU and I make a reset at start up.

Are these values make a sense, are they normal.
VSS = GND,
VREFP is 0V ( is it a problem ?? )
VCAP2 = 5.35V
VCAP1 = 1.36V

0 Brian Pisani over 6 years ago in reply to Ferhat Bayir

TI__Mastermind 38745 points

Hello Ferhat,

VREFP will be 2.42 V when bit 5 of the CONFIG2 register is set. You said that you are able to write registers. Can you set that bit? Another way to check your register writes is to set one of the GPIOs as an output high or low and probe it to make sure it is the value you set. If you can write but not read, then check your SDATAC command. That command will allow the registers to be read.

Brian