TLV571: TLV571 with SWPWDN bit set in CR0 will not work (powerdown mode not Normal)

Hi David,

It mentions in the datasheet that if RD is not present one clock after the conversion it will go into auto power down mode.  Could you try that and see if it helps?

Mike

Hi David,

From my reading of the datasheet is seems like if SWPWDN is 0 (Normal mode) then the part is looking at RD to determine when to shut down.  It will auto power down if RD is not present one clock after conversion.  Could you try this, as soon as EOC goes high pulse the RD pin to low and back to high and see if that helps? 

The other option is if SWPWDN is 1 (Powerdown mode) the power down is controlled directly by pulling CS to DVDD.

I have not been able to find the area of the datasheet where it says that the first conversion after power down is bad.  Could you point it out to me?

Mike

Hi Mike,

as I said, "As soon as eoc goes high I take the next sample"

That is my polling solution.

The problem with SWPWDN = 1 is that the TLV571 always returns a fixed number when it is set.

(not necessarily the same number after disconnecting the power)

I cannot find a reference in the datasheet to suggest what else must be done when SWPWDN is set-

There may well be a fault in the internal coding of the chip, or perhaps you have access to alternative details?

Re the invalid reading: cf  power up and initialization on page 12:

Cheers,

David

Hello Mike,

Firstly I appreciate your diligence in the pursuit of this problem.

I have tried variations in the CS state during the setup of CR0, without success.

(Rather like fishing without a map of the riverbed or knowing which fish to target!)

This works for normal mode:

//setup data port to output on port "PORTA"

//setup control line c0-c2 output, c0 = CS, c1 = WR, c2 =RD on port "PORTC"

byte cr1 = B01010000;
PORTA = cr1;

cli(); // disable interupts
PORTC = B110; // read high, WR high, CS low
__asm__("nop\n\t");  // wait one machine cycle (at 16 MHz)  yielding a 62.5 ns (nanosecond) delay
PORTC = B100; // read high, WR low, CS low
__asm__("nop\n\t");
PORTC = B110; // read high, WR high, CS low - transfer data
__asm__("nop\n\t");
  while ((PINC & econ) == 0 ); // wait for econ to go high
sei(); // enable interrupts

cr0 = B00110000;

PORTA = cr0;

cli();
PORTC = B110; // read high, WR high, CS low
__asm__("nop\n\t");

PORTC = B100; // read high, WR low, CS low
__asm__("nop\n\t");
PORTC = B110; // read high, WR high, CS low - transfer data
__asm__("nop\n\t");
  while ((PINC & econ) == 0 ); // wait for econ to go high
sei();

DDRA = B00000000; Data port now input
test = PINA; // get data off port

Serial.print(F("Test read "));
  for(byte i = 0; i < 10; i++) {
  PORTC = B00000010; // RD low, WR high, CS low
  PORTC = B00000110; // RD high, WR high, CS low
  // wait for econ to go high
    while ((PINC & econ) == 0 );
  test = PINA;
  Serial.print(" "); Serial.print(test);
  }

The output with a square wave as source:

Test read  9 9 9 5 248 249 251 9 9 8

Works!

With cr0 = B00110100;

Output:

Test read  249 249 249 249 249 249 249 249 249 249

Fixed eroneous data

I tried

1) sending all control lines high after the write cycle

2) Toggling cs high during the write cycle:

cli();
PORTC = B110; // read high, WR high, CS low
__asm__("nop\n\t");

PORTC = B100; // read high, WR low, CS low
__asm__("nop\n\t");
PORTC = B111; // read high, WR high, CS high - transfer data
__asm__("nop\n\t");
  while ((PINC & econ) == 0 ); // wait for econ to go high
sei();

3) keeping CS high during the data read

The result: (B11111001)

Test read  249 249 249 249 249 249 249 249 249 249

Any suggestions for a specific control line flow structure would be greatly appreciated.

Regards,

David

Hello Mike,

I agree with your description. This was the conclusion I had come to when I posted the question.

I am not in a position to disect my circuit  board to measure the supply current.

As I detailed above, there is no method of preventing autopowerdown, other than..

cycling the RD line.

Setting D2 in CR0 is a pointless option- I suspect the repeated number returned from the ADC data lines after D2=1 is simply the last value written to the data line when D2 is set.

I will therefore move on.

Is there a parallel, 5v reference adc  with at least 1.2 Msps and a more recent pedigree?

I am looking at the TLC5510A with 20Msps and a maximum reference of 4V - not ideal.

Regards,

David

Hi David,

The TLC5510A is the closest device that I could also find to your requirements.  If you were able to go to a SPI interface instead of parallel, that makes available some other choices like the ADS7884.

Mike

Thanks Mike.