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DAC8775EVM: DAC8775:SPI C application not Configuring the Voltage mode

siddhant kumar
Prodigy 50 points
Part Number: DAC8775EVM
Other Parts Discussed in Thread: DAC8775

Hi forum, Hope everyone is doing fine.

I have landed into one problem while testing DAC8775 EVM. With Spartan 6 FPGA  And Microblaze Processor I am trying to configure the DAC8775EVM using the SPI lines written in C Code.

Thing is that  my Application code is able to configure the DAC in current mode and I am getting successful result but when I change the Code for Voltage Mode it is not working, my reference voltage also doesnt come when I write the data for Voltage configuration mode.

I would like to know what exactly could be the problem? If the code is properly configuring the current mode then it should also configure the voltage mode,  I am unable to understand it, please someone help me in debugging this.

I'll be waiting for quick reply.

Many thanks.

Attached screenshot would give some sort of ideas.

  • 0
    TI__Mastermind 46290 points
    Hi Siddhant,

    I reviewed your code sequence assuming that the SPI clock phase and polarity are correct given that you are successfully configuring and using the current output. Nonetheless perhaps at least a register read-back would be valuable to ensure that the register map contents are as expected based on this write sequence if we don't immediately solve this.

    I noticed in your sequence that the DC/DC converters are being enabled in full-tracking mode, which is really only valid for a current output. For voltage outputs the output stage does not benefit from a adaptive / tracking supply voltages, and therefore should be in clamp mode with either +/-15V clamp or +/-18V clamp.

    I believe the EVM GUI coerces this behavior, however I am not sure that the device does the same in the digital core. Again the read-back may be helpful here or simply probing your VPOS and VNEG voltages after the configuration is complete. If these potentials are not at ~ +/-15V the output amplifiers will not be enabled and therefore the VOUT will not be functional.
  • 0 in reply to Kevin Duke
    TI__Mastermind 46290 points
    Hi Siddhant,

    Do you have any update for this thread?
  • 0 in reply to Kevin Duke
    Prodigy 50 points

    Hi Duke!

    Yes! Things are moving but in different way. I got the voltage output as I wanted but the sequence flow of registers which is not as per DAC datasheet, Attached Screenshot may give you the more idea how it is working.

    If you can elaborate it more then please provide us the answer of this question : why this is working in this sequence of registers?

  • 0 in reply to siddhant kumar
    TI__Mastermind 46290 points
    Siddhant,

    It looks like not only did the sequence change but also the content that is being written to the Configuration Buck-Boost Converter register. In the second sequence the buck-boost is being configured in clamp mode while it is in auto-learn in the first sequence.

    I think the improvement is more related to the register content / configuration versus the order of operations for the writes.