AMC1306E25: Synchronisation of insulated sigma delta ADC

Hi Marko,

It would depend more on the arrangement of your AMC1306 and AMC1303 devices compared to the position of the DSP. Also, using 7 clock loads from one AMC1303 might be pushing it a little. You could consider one clock line from the DSP feeding into a clock buffer to eight AMC1306 devices. On the Manchester side, it's the internal clock of the DSP that does the decoding so you would not need to feedback the modulator clock to the SDFM.

Hi,
ty for the fast response.

All the AMC devices are on 1 board edge. While the DSP is somewhere in the middle of the board. The length of a clk like would be in the range of 200 mm form farthest AMC devices.

I can put oscilator on 1 end and termination on the other and connect the clk lines to this line with short stups. Then as this is a 4 layer board the propagation delay would be ~ 6 ns/m so ~ 1.2ns. This would just mean if data lines are the same that the farthest ADC is 1 ns out of sync. So no problem there right?

Is there any substantial gain if I generate the clk with DSP?

EDIT:

Or did you mean a clock buffer that multiples clk lines and drives each chip separatist? 

Best regards,
Marko

Hi Marko,

I meant a clock buffer that drives 2-4 devices, you would not necessarily have to drive each line independently. There is no substantial gain using the DSP clock, an external oscillator is fine - or the AMC1303 option you mentioned earlier, I would still encourage you to use a buffer though since 7 devices would load down the clock output. I also think you would want to use the Manchester output version there as well, the AMC1303E2520, otherwise you would have to route the CLKOUT of the AMC1303M2520 back to that SDFM CKx input and run that one channel in Mode 1.