AMC1304L25: gain error when sensing voltage : front end question

Hi Alain,

Welcome to our e2e forum! If you tried to attach a file with your AMC1304L25 query, unfortunately it did not come through. Having a large shunt can impact the gain error of your circuit. Have you taken a look at the application note written a couple years ago by one of my colleagues Polly Chung? You can find it here: www.ti.com/.../sbaa214.pdf - you may find some of her testing useful in your application.

Hi Tom,

Thanks for answering.

Yes, I had a look at this note.

I'm using a rather low shunt value (2*41.2ohms) to keep gain error under control (about 0.3% as far as I understand).

I was then surprised of getting a final error of about 2.2%.

See below schematic. Am I wrong ?

Hi Tom,

We are using AMC1210 as stream demodulator.

With below settings

AMC1210 clk is 10 MHz.

 Filter_CTRL :      0x4

• Pin CLKx is an input
• Signal SH2 is chosen as sample-and-hold signal
• The time is measured from the last filter update to the last rising edge of the selected sample-and-hold signal
• The clock speed is equal to the data rate from the modulator
• Filter_SYNC :      0xFF9

• Sinc filter runs with a Sinc3 structure
• The acknowledge flag is enabled for the particular filter
• The filter is enabled and data are produced in the sinc filter and/or integrator
• Oversampling ratio = 250 (0xF9+1)

• Filter_INT   :       0x4800

• Shift control = 9
• The data is stored in 16-bit two's complement
• The demodulation for resolver applications is disabled
• The data from the sinc filter output is stored in the register map
• The oversampling mode updates the data output of the integrator
• Oversampling ratio = 1 (0x0+1)

• Filter_COMP :   0x0

• The modulator failure flag as well as the output INT is disabled for this particular flag
• Comparator filter runs with a sincfast structure
• The low-level interrupt flag as well as the output INT is disabled for this particular flag
• The high-level interrupt flag as well as the output INT is disabled for this particular flag
• Oversampling ratio = 1 (0x0+1)

• General_CTRL : 0x0

• New data is signaled with a '1' on the pin ACK
• An interrupt is signaled with a positive transition on the pin INT
• Interrupt pin and interrupt flags are blocked (interrupt pin INT always inactive).
• Pattern count = 0

• Clock_DIVIDER : 0x800

• The high current option for pins PWM1 and PWM2 is disabled
• Sinc filter units can be enabled if bit FEN is '1'.
• Signal generator is disabled
• No phase calibration is performing
• Clock divider is off, outgoing clock equals incoming clock

Thus, we assume a full scale range of OSR^3 / 2^shift_control (ADC code) = 205^3 / 2^9 = +/-30517, corresponding to the analog input range (+/-312.5mV)

Hi Alan,

Thank you for getting back to us!  I'm glad to hear that the issue is resolved!