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ADS1241
Related Posts

  • Forum Post: Re: ADS1241 A/D Converter "Full Scale Resolution" Question

    Rick Downs - WEBENCH Design Center
    Actually, the "FSR" in this case refers to the name of the register(s): "Full Scale Register" - I tend to think of it more as "Full Scale Range". This application note describes how the offset and full scale registers work on a different series of converters, but the information...
    on Dec 29, 2009

  • Forum Post: Correct way to "scan" multiple input channels with ADS1243

    Panu Tuominen
    Hello, I am looking for "the correct" way to accomplish the following task with ADS1243: 4 differential input signals the voltage of all four inputs signals should be measured in about 600 ms (i.e. 7.5 Hz data rate is enough) To fulfill these requirements with slowest possible...
    on May 17, 2010

  • Forum Post: Re: Correct way to "scan" multiple input channels with ADS1243

    Joseph Wu
    Panu, Some of the problem may come from an error in this device, but I'll address the questions as you've asked them and add details to the explanation. 1. First, I think that you generally would want to use the DSYNC to synchronize the conversion. DSYNC is meant to hold the modulator in reset...
    on May 17, 2010

  • Forum Post: Polling #DRDY via SPI on ADS1241 and output register update

    none53113
    Regarding the ADS1241, I would like to know if you can recommend a sequence for reading 4 channels by means of polling DRDY via SPI. I am not sure how to avoid reading corrupt data from the output register. Currently I do the following: read #DRDY bit, if 0: read result set gain for...
    on Jul 8, 2010

  • Forum Post: Re: Polling #DRDY via SPI on ADS1241 and output register update

    Joseph Wu
    Hi, I've read through your post and I don't see any glaring errors. The sequence you describe: RDATA, Set Gain, Set Mux, SYNC, dummy read to set DRDYn high makes sense to me and that's the way I would have done it to read multiple channels. Just to be sure however, I'd like some more...
    on Jul 9, 2010

  • Forum Post: Re: AD1241 offset compensation register (OCR) format

    Joseph Wu
    I'm sorry about the confusion in the datasheet, but the OCR is used as a subtraction and not as a multiplication. I'm attaching a diagram that shows that the OCR is subtracted after the digital filter, but before the multiplication of the FSR. This diagram comes from a different part, but...
    on Jul 16, 2010

  • Forum Post: Re: ADS1243 DRDY notification

    Joseph Wu
    I'm not sure how your controller misses the DRDYn pulse, but it may depend on your setup. The DRDYn pulse is narrow and is about 32us wide with a 4.91MHz clock (the width scales with the clock rate). In the defaults setting with this clock, the data rate is 30Hz. Finding a 32us pulse in a 33ms window...
    on Aug 14, 2010

  • Forum Post: ADS1241 clock frequency

    Alice Pavanini
    Hello, I'm using ADS1241and I experienced the following problem: when I use it with a crystal like 4.9152MHz it works correctly. But when I use the internal oscillator of my MCU (for example, 4 MHz or sub-multiplies) or even a 4 MHz crystal, it starts shifting out data on DOUT without waiting...
    on Oct 8, 2010

  • Forum Post: Re: ADS1241 clock frequency

    Bob Benjamin
    Alice, There could be an issue when the clock is applied in relation to device power up. I would suggest resetting the ADS1241 after the clock is applied from the MCU. Then I would set the configuration of the device in the manner in which you want to operate it and run the calibration routines like...
    on Oct 8, 2010

  • Forum Post: Re: ADS1243 versus ADS1241

    Bob Benjamin
    David, It is possible to gain some advantage with split supplies, assuming that you have implemented your design so that noise has been reduced for the analog side. This includes not only how clean AVDD is, but how well your PCB layout is, components used, etc.. Noise can be found pretty quickly at...
    on Apr 21, 2011

  • Forum Post: Re: ADS1243 versus ADS1241

    Bob Benjamin
    David, There are a couple of considerations that I neglected to discuss earlier. One is in regards to the buffer, and the other is the range setting for Vref. If you use the on-device buffer, your input range is reduced due to loss of headroom. The range setting can also be an additional thing to...
    on Apr 22, 2011

  • Forum Post: Re: ADS1241 - Crystal and Capacitance Guide

    Bob Benjamin
    Poh Leong Ng, I'm not sure if you are using one of the ADS1241 datasheet recommended crystals, but not all crystals are constructed or respond the same. You are correct about the trace lengths and crystal placement. However, even if the traces are short there can be added capacitance in the...
    on May 11, 2011

  • Forum Post: Re: ADS1241 - Crystal and Capacitance Guide

    Bob Benjamin
    Poh Leong Ng, There is good basic information in the app note you refer to, but remember the circuit is designed slightly different between devices as the frequencies involved are quite different. There are a lot of sources for stray capacitance, and some may be from the vias, but are also in the...
    on May 12, 2011

  • Forum Post: ADS1241 Code Example

    David Pfaltzgraff
    The main TI web site seems to be down. So pursuing anything there is futile. I am working through a design using the ADS1241 and was wondering if there are any examples of its setup and use. Although code would be most helpful, a flow diagram would be a big help in getting evrything in the right order...
    on May 18, 2011

  • Forum Post: Re: ADS1241 Code Example

    Bob Benjamin
    David, Here is some example code for the IAR compiler to operate with the ADS1241MEVM and a specific motherboard that is no longer being manufactured (HPA449.) You should be able to follow the flow and see what is needed to communicate with the device. Best regards, Bob B
    on May 18, 2011

  • Forum Post: Re: ADS1241 Code Example

    Bob Benjamin
    David, I can't speak for the code specifically myself. Those that worked most closely with that specific code are no longer with TI. There may be some internal delays related to calibration or some other specific changes that may cause a reading to be invalid. You mentioned the calibration case...
    on May 19, 2011

  • Forum Post: Re: ADS1241 Code Example

    Bob Benjamin
    David, I was looking again at the datasheet and the SELFOCAL and SELFGCAL each take 2 tData periods, so I that makes the SELFCAL take 4 tData periods. The SELFCAL requires the PGA at 1. The offset cal is down first, then the gain cal. If you use a different PGA setting in your application, you should...
    on May 20, 2011

  • Forum Post: Re: ADS1241 abnormal DOUT when no input to analog input channels

    Bob Benjamin
    Poh Leong Ng, Burnout current sources (assuming they are turned on) will provide a result as full-scale for an open circuit condition. You have not provided very much information as to how the test is being done. By the scope data it appears as though some gain is being used. Every time the PGA setting...
    on Jul 25, 2011

  • Forum Post: Re: ADS1241 abnormal DOUT when no input to analog input channels

    Bob Benjamin
    Poh Leong Ng, The value I believe to be returned from the scope shot is about 4.7mV. This is based on 2.5V for the reference and a gain of 16. This seems a bit high. Was the self offset calibration (SELFOCAL) run after the PGA was changed? Also, the BOCS is not on for this measurement, so I'm...
    on Jul 28, 2011

  • Forum Post: Re: ADS1241 abnormal DOUT when no input to analog input channels

    Bob Benjamin
    Poh Leong Ng, As far as the code, the only thing that stood out to me is SELFOCAL should always be issued before SELFGCAL. From the schematic I noticed that the differential cap size(0.01uF) as compared to the common mode cap size (0.1uF) is reversed. You will see significant drift issues unless...
    on Aug 8, 2011

  • Forum Post: ADS1241 Sequencing

    David Pfaltzgraff
    Working from the data sheet I gather that I can read the data at the same time that I'm writing a new MUX command to the ADS1241. Am I interpreting this right? What I'm doing is: send the RDATA command wait a minimum of 50 Tosc periods send WREG (for the MUX register) and read...
    on Aug 10, 2011

  • Forum Post: Re: ADS1241 Sequencing

    Bob Benjamin
    David, The device does work in full-duplex mode, but I believe the state machine will not allow you to issue another command until the first command is complete (data is shifted out.) Unfortunately I don't have an easy way of checking this out at this time, but the state machine from similar devices...
    on Aug 10, 2011

  • Forum Post: Re: ADS1241 Sequencing

    Bob Benjamin
    David, Basically the conversions never stop even if you use STOPC. STOPC stops updating the output register with the conversion result. Unlike some of our newer parts, the digital filter is not reset when the MUX change happens so you can get an error depending on when you change the mux in relation...
    on Aug 11, 2011

  • Forum Post: Re: ADS1241 Sequencing

    Bob Benjamin
    David, You really don't need to wait/discard that many readings. The very first reading after the mux change will be valid data, but there will be some settling error associated with the result, so I would discard the first result. After that you should have good data. There may be other good...
    on Aug 11, 2011

  • Forum Post: Re: ADS1241 abnormal DOUT when no input to analog input channels

    Bob Benjamin
    Poh Leong Ng, Datasheet offset performance can only be achieved by using the calibration commands. Upon startup a SELFCAL command should be issued. If the PGA setting is changed from a value of 1, then after setting the PGA to a new value a SELFOCAL should be issued. To minimize temperature effects...
    on Aug 22, 2011
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