hsync can not be detected by tvp7002

Hi ,

TVP7002 MUST be programmed according to your connection and input/output format.

Please check the register table here

http://www.ti.com/cn/lit/zip/slec022

BR,

Eason

In addition though you can use the line count, pixel count registers and the H/V polarity detect registers to help determine exactly which video format the device is receiving.

Once you have determined the format being received you then need to configure the TVP accordingly in order to correctly digitize the video.

BR,

Steve

hi steve,

i read from reg Clock_Per_Line_Status, HSYNC_Status, VSYNC_Status, resule is 0x00,0x00,0x01. i suspect the internal pll isn't work. how can i test it? 

regards,

wang

I don't think this is a PLL issue since the PLL is not needed to make these measurements, but there is an internal oscillator which is required.

Can you please check that all the power supplies are at the correct voltage, that all ground pins are correctly connected to ground and that you have followed all the schematic requirements outlined in Figure 8 of the TVP7002 datasheet.

You can also use the TVP7002 EVM schematics as a reference. These are available in the user guide (page 45) available here...

http://www.ti.com/tool/tvp7002evm?keyMatch=tvp7002&tisearch=Search-EN

BR,

Steve

steve,

thanks for replay.

i have checked the schematics carefully, all power and ground connect well. only different is DVDD and AVDD is 1.8V, not 1.9V as datasheet. but it's ok, right.

once, i connected the 4.7nF capacitor between FILT1 and FILT2, then i fixed it. did this damage the internal oscillator?

regards,

wang

steve,

i set FIDOUT (pin 22) as Data_Enable_output, or Internal_clock_reference_output,or coast_output . it's always zero, no signal.

For FID identification you will need to ensure that a) you are supplying an interlaced video format to the analog inputs and b) you have configured all the formatting registers to match the analog video format you are supplying.

If there is no activity when set to the internal reference clock then make sure that there is nothing external to the TVP7002 connected to pin 22 that might be driving it low.

BR,

Steve

steve,

the video format is standard pc graph, but only green,hsync,vsync, no red and blue signal. vsync can be detected by the chip, but hsync can't be(from reg 0x14 status). which regs should be configured? i set regs reference THE THS8135 EVM User Guid.

there is no external to pin 22. it connect a resister then float to test point.

regards.

wang

Are you getting values in the pixel count and line count registers?

These registers will indicate if a) the internal oscillator is running and b) that H & V are being detected.

H-lock and v-lock require the TVP to be configured correctly to receive the specific video signal being supplied.

Which register set are you using from the THS8135 EVM?

BR,

Steve

Do you have the correct h-sync input selected?

BR,

Steve

steve,

i am sure the hsync is correct (1028*768@60hz, the frequency of hsyc is 48.3kHz, active low). can you tell me which register is pixel count and line count? the result of reading register 0x37,0x38,0x39,0x3a,0x3b,0x3c is 0x01, 0x20, 0x00, 0x00, 0x00,0x01.

i set registers on page 19 of THS8135EVM Evaluation Module User's Guide (SLEU109 JAN 2010). the result of register 0x14 is still 0x31.

i strongly doubt the HPLL is not work.

regards.

wang

Registers 37h/38h contain the line count and clocks per line is in registers 39h/3ah.

Note, the clocks per line is reference clocks per line and not pixel clocks per line since this is used to determine how to set the pixel clock. The reference clock is typically 6MHz unless an external reference clock is selected.

Measuring the clocks per line allows an estimate  of the line frequency. This, coupled with the line count can be used to determine most of the VESA standard modes, hence how to configure the TVP. If complete checking is needed then a more accurate, higher resolution clock needs to be provided for the reference so that the horizontal frequency can be more accurately determined.

Note, these registers update regardless of the PLL status.

BR,

Steve

the result of reading register 37h/38h & 39h/3ah is 0x01,0x20,0x00,0x00. does that mean no hsync signal detected? now i capture the internal reference clock on pin 22. it is 6.7MHz. and the hsync is truely on pin81, active low, voltage level is 3.3v. 

vsync is always can be detected, but hsync is not, why?

ps. i set registers below:

data = 0x54;
i2c_WriteChip(0x01, data);
data = 0x00;
i2c_WriteChip(0x02, data);
data = 0x58;
i2c_WriteChip(0x03, data);
data = 0x00;
i2c_WriteChip(0x04, data);
data = 0x06;
i2c_WriteChip(0x05, data);
data = 0x10;
i2c_WriteChip(0x06, data);

data = 0x00;
i2c_WriteChip(0x0e, data);

data = 0x01;
i2c_WriteChip(0x12, data);
data = 0x00;
i2c_WriteChip(0x13, data);

data = 0x40;
i2c_WriteChip(0x17, data);

data = 0xc2;
i2c_WriteChip(0x1a, data);

data = 0x04;
i2c_WriteChip(0x22, data);
data = 0x10;
i2c_WriteChip(0x2b, data);

Make sure you have the correct h-sync input selected in your configuration.

Check the pin directly with an oscilloscope to make sure you do not have a hardware issue which is stopping the h-sync signal reaching the TVP correctly.

What do these registers read when you disconnect the video input?

It does not make sense that the line count register reads 0x0120 but clocks per line is zero since the vertical line count really just counts h-syncs between v sync pulses so this implies both H & V are getting to the TVP correctly.

As a test do net set any TVP registers other than the H & V select registers and make sure that you get correct readings with just those registers configured.

BR,

Steve

steve,

when i disconnected the video, the value of 0x14 is 0x2d, no hsync, no vsync.

if i set any registers, the vsync still can be detected, hsync is not.

whatever the registers be set, the value of 0x39&0x40 always 0;

i capture the 6.7 mHz internal reference clock on pin 22 last time,but there is no signal today,i don't know why.

questions:

1.i didn't connect the thermal pad to ground before, is that ok? i connect thermal pad to ground now, but no change.

2. i don't use the external 27MHz reference clock, is that ok?

3. i only use the green signal, hsync, vsync, no red & blue signal, is that ok?

4. i left the unused pin float,is that ok?

regards.

wang

steve,

this time, i set any register and read from reg 0x14. if there is h&vsync, the value is 0x7d, if no h&vsync,the value is 0x6d. it means VSYNC from sync separator and active high,but it  connect to vsync pin and active low actually.that is why?

if i set 0x12 to reg 0x0e and read from reg 0x14, the value is 0x25 if no signal and 0x31 if  there is  signal. 

Check all your power supplies at the TVP7002 pin to make sure they are all correct.

Can you check that the H & V syncs are actually getting to the TVP7002 input pins correctly with an oscilloscope?

If you cannot see the 6MHz reference output then is it possible you have damaged the device? Can you try replacing it?

Not connecting the thermal pad should not be an issue.

Not using an external 27MHz is fine. You might try this as a test though. The higher frequency allows more accurate display resolution to be determined.

Using only green, H & V is fine.

All unused digital inputs must be driven to some value. Floating unused outputs is fine.

I can't think of anything else other than you have a connectivity issue (power, signals, shorts etc...). Do you see the issue on more than one board?

Make sure you are following the application example on page 52 of the TVP datasheet exactly and that all the power supplies are correct at the pin of the TVP7002.

BR,

Steve