Dear Sir/Madam
We are using TI TVP5150am1 chip in our product.
I am trying to configure the chip in order to extract WSS info in PAL system mode.
I am using the configuration flow by the “TVP5150A VBI Quick Start” (SLEU046.pdf Oct 2003) document.
(My configuration code has been added on end of the mail).
When reading the VDP status register I get 0x0. It looks like the chip does not recognize any VBI data.
- Is there a problem with my configuration?
- Is there any other way to get the WSS feature without using the VDP memory configuration?
- How can I use the full field (what registers should I configure) I order to have WSS support.
Best Regards.
Boris Barak.
My configuration code:
AnalogReader:: AnalogReader()
{
WORD PalWssVal[16] = {0x5B, 0x55, 0xC5, 0xFF, 0x0, 0x71, 0x6E, 0x42, 0xA6, 0xCD, 0x0F, 0x0, 0x0, 0x0, 0x3A, 0x0};
if (!m_FirstConfig)
{
// Disable full field mode
AbTrace("ARReaderAnalog::ARReaderAnalog() Ch=%d WSS: Disable full field mode\n", m_dwChannel);
val = 0x00;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xCF, val);
// Write FFh to LineMode registers
AbTrace("ARReaderAnalog::ARReaderAnalog() Ch=%d WSS: Write 0xFF to 0xD0-0xFB\n", m_dwChannel);
for (WORD i = 0xD0; i < 0xFC; i++)
{
val = 0xFF;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(i, val);
}
// Load C4h with C-RAM address[7:0]
// Load C5h with C-RAM address[8]
AbTrace("ARReaderAnalog::ARReaderAnalog() Ch=%d WSS: Load regs with C-RAM address\n", m_dwChannel);
val = 0x10;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xc4, val);
val = 0x01;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xc5, val);
AbTrace("ARReaderAnalog::ARReaderAnalog() Ch=%d WSS: Write 16 bytes of WSS C-RAM data\n", m_dwChannel);
// Write 16 bytes of WSS C-RAM data
for (int count = 0; count < 16; count++)
{
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xc3, PalWssVal[count]);
}
// PAL WSS Line Mode setup for line 23 (source input) of both fields. PAL line
// numbering has 3 line offset so the Line 26 line mode registers are used.
AbTrace("ARReaderAnalog::ARReaderAnalog() Ch=%d WSS: Configure the line register\n", m_dwChannel);
// line 26 field 1 (0xF8), mode bits = 0x08
val = 0x08;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xF8, val);
// line 26 field 2 (0xF9), mode bits = 0x08
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xF9, val);
// disable ANC data, enable FIFO access.
val = 0x01;
((IAnalogVideoChip*)m_pVideoChip)->WriteWord(0xCD, val);
m_FirstConfig = true;
}
}