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TVP5150AM1 Hsync signal error.

Ta Nam
Prodigy 30 points
Other Parts Discussed in Thread: TVP5150AM1, TVP5150

Hi everyone,


I'm using TVP5150AM1 to capture video signal (PAL) for our image processing board (FPGA). However, when displaying the output, the video image was flickering. When I checked the output signals of TVP5150 I found that the Hsync signal was disappear in a period of 300ms, and then appear in next 400ms as describe in the image below. The other output signal (Vsync, active, ..) look fine.


Do you know the reason of this problem? Thank you.


Output Hsync signal of TVP5150.


Output Vsync signal (fine)

active video signal.

  • 0
    Prodigy 30 points
    Hi all,

    Here is my config parameters for TVP5150IC.

    // IIC TVP5150 core base address
    #define TVP5150_IIC_CORE_BASE_ADDR XPAR_IIC_0_BASEADDR

    // Detailed TVP5150 I2C addresses
    #define IIC_TVP5150_BASE_ADDR 0xBA
    #define IIC_TVP5150_MIS_CTRL_REG_ADDR 0x03 //Miscellaneous Controls Register Address
    #define IIC_TVP5150_CFSHPIN_REG_ADDR 0x0F //Config share pin registert address
    #define IIC_TVP5150_ACTIVE_CROP_ADDR 0x12
    #define IIC_TVP5150_AUSWMASK_REG_ADDR 0x04
    #define IIC_TVP5150_OUTRATE_REG_ADDR 0x0D //Outputs and data rates select register

    //Miscellaneous register 0x03
    //VBLK/GPCL function select
    //0 = GPCL (default)
    //1 = VBLK
    //GPCL logic level (affects INTREQ/GPCL/VBLK output only if bit 7 is set to 0 and bit 5 is set to 1)
    //0 = GPCL is set to logic 0 (default)
    //1 = GPCL is set to logic 1
    //INTREQ/GPCL/VBLK output enable
    //0 = Output disabled (default)
    //1 = Output enabled (recommended)
    //Lock status (HVLK)
    //0 = Terminal VSYNC/PALI outputs the PAL indicator (PALI) signal and terminal FID/GLCO outputs the
    //field ID (FID) signal (default) (if terminals are configured to output PALI and FID in register 0Fh).
    //1 = Terminal VSYNC/PALI outputs the horizontal lock indicator (HLK) and terminal FID outputs the
    //vertical lock indicator (VLK) (if terminals are configured to output PALI and FID in register 0Fh).
    //YCbCr output enable
    //0 = YOUT[7:0] high impedance (default)
    //1 = YOUT[7:0] active
    //HSYNC, VSYNC/PALI, active video indicator (AVID), and FID/GLCO output enables
    //0 = HSYNC, VSYNC/PALI, AVID, and FID/GLCO are high-impedance (default).
    //1 = HSYNC, VSYNC/PALI, AVID, and FID/GLCO are active
    //Vertical blanking on/off
    //0 = Vertical blanking (VBLK) off (default)
    //1 = Vertical blanking (VBLK) on
    //Clock output enable
    //0 = SCLK output is high impedance
    //1 = SCLK output is enabled (default)
    #define IIC_TVP5150_MIS_CTRL_REG_VAL 0xAF
    #define IIC_TVP5150_CFSHPIN_REG_VAL 0x12
    #define IIC_TVP5150_ACTIVE_CROP_VAL 0x04
    #define IIC_TVP5150_AUSWMASK_REG_VAL 0xC0
    #define IIC_TVP5150_OUTRATE_REG_VAL 0x40
  • 0 in reply to Ta Nam
    TI__Mastermind 43875 points

    What does the analog input video look like (at the device input pin)?

    Can you capture the analog input at the same time as the hsync?

    Leave as many registers as possible at their default. You should only really need to enable the outputs and, if not using ITU656, change the output format. Don't change any timings etc...

    BR,

    Steve

  • 0
    Prodigy 30 points

    Hi all,


    I followed the config file of TVP5150 in this link and it worked.

    http://www.ti.com/tool/tvp5150sw-linux

    Thanks so much!