I am using CCS 5.1 under Linux on custom hardware.
After I connect to the C764X core reading McASP0 registers at 0x48038000 return all zero.
I then connected to the CortexA8 core and reading McASP0 registers returned 0x10C5387D.
I have concluded that neither of these connection methods are showing me the McASP0 register settings. How do I read them?
From the Data sheet, the L3 Memory map for McASP0 is:
0x4600_0000 0x463F_FFFF 4MB McASP0 Data Peripheral Registers
where as L4 Memory map for C674x is:
0x4803_8000 0x4803_9FFF 0x0803_8000 0x0803_9FFF 8KB McASP0 CFG Peripheral Registers
Thanks for pointing me in the right direction. In table 2-6, McASP0 is also listed as having an L4 base address of 0x0803_8000 (for the C64x). If I connect JTAG to DSP I should use the DSP's L4 address ?
The implication from table 2-4 is that the DSP does not have access to McASP0 through the L3 interconnect ?
Yes, you should use the DSP's L4 address once you connected to DSP.
It has limited memory to access from DSP. Please check DS for the Mem avail.
Thanks for the prompt reply. According to my reading, and inspecting Table 2-4
0x0800_0000 0x08FF_FFFF 16MB L4 Slow Peripheral Domain
maps to the "C674x DSP" column in table 2-6 which is where you got the
information you replied with several emails ago.
The only thing is, if I connect via JTAG to the C674x core I still read back 0x0 for McASP when using address 0x0803_8000. Is that to be expected ? Is something blocking jtag accesses ?
Sorry for late response. Let me move this question to CCS to see if they can help you.
We found that adding
to the linux board support file enabled the DSP to configure the McASP. We have not yet researched the exact side-effects (at a register level) of the above calls.
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