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TI Home » TI E2E Community » Support Forums » Development Tools » Code Composer Studio » Code Composer Forum » Using ETB on secondary cores in a 'C6474?
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  • Using ETB on secondary cores in a 'C6474?

    Using ETB on secondary cores in a 'C6474?

    • Michael P
      Posted by Michael P
      on Aug 03 2012 12:24 PM
      Intellectual580 points

      I am using CCS v5.2.0 with a 'C6474 DSP -- essentially on an EVMC6474 board -- and trying to use the ETB to collect trace data for cores 1 and 2.  I can collect ETB data from core 0 with no problems, and I can use the "Trace System Control" dialog to select ETB as the receiver for cores 1 and 2 (C64XP_1B and C64XP_1C in the GUI).  However, it does not seem like my trace breakpoint(s) affect those secondary cores -- only the first core.

      In particular, I see unexpected behavior in step 4 of the following sequence:

      1. I use the "Trace Control" menu option to select the ETB as a receiver for core 2 (C64XP_1C); I leave the other two cores at "None".
      2. When I select the ETB-enabled core in the "Debug" tab, the "Trace Display" tab shows a connection for the ETB-enabled core; the other two cores show "Trace Display - <No Data>".
      3. I can add a "Trace On" breakpoint to trace Program Address and Time Stamp data.
      4. If I try to enable that breakpoint, an error shows up in the Error Log tab: "Channel error: Receiver is not selected for trace collection.  Use Trace Control to select a receiver."

      If I set up a collector for core 0 (instead of or in addition to the one for core 2), I can enable the breakpoint without causing that error message, but core 2's Trace Display stays empty when core 0's Trace Display shows the expected trace data.

      How can I get cores 1 and 2 to record into their ETBs (ideally, during the same run that core 0 is recording into its ETB), and then read that out into CCSv5?

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    • desouza
      Posted by desouza
      on Aug 17 2012 15:54 PM
      Guru55800 points

      Hi,

      That is intriguing, as I was able to properly set up ETB trace collection in each core, as well as simultaneously. I posted a short clip in the page below with the procedure I followed; could you check it and see if there are any details missing in your setup?

      http://processors.wiki.ti.com/index.php/C6474_Trace

      Hope this helps,

      Rafael 


      If my reply answers your question please click on the green button "Verify Answer".
      Search the wiki or go to useful pages for SDOWP, CGT, BIOS, CCSv3, CCSv4, CCSv5
      EMU_Trace
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