This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Incorrect operation of CCS profile clock when benchmarking F28027 floating-point math

I believe there is some inconsistency when using the CCS profile clock to perform computational benchmarking on the F28027. I am using the C2000 LaunchPad to perform matrix multiplications for two cases; int32 matrices in the first case and float32 matrices in the second case. In the two programs shown below, I place breakpoints at line 25 and line 66. I zero out the profile clock after the first breakpoint is reached, and I focus on the value shown by the profile clock after the second breakpoint is reached. Here are my observations:

1. int32 matrices: For this case, the profile clock shows the correct value at the second breakpoint after one execution of the program. Without leaving the debug session, if I click CPU Reset followed by Restart in order to repeat the experiment, the profile clock value at the second breakpoint will be identical to what was displayed during the first experiment. This is CORRECT behavior (and is consistent with and without compiler optimizations).

2. float32 matrices: For this case, the profile clock shows the correct value at the second breakpoint after one execution of the program. Without leaving the debug session, if I click CPU Reset followed by Restart in order to repeat the experiment, the profile clock value at the second breakpoint will be significantly smaller than what was displayed during the first experiment, and each time I repeat the experiment the profile clock value at the second breakpoint will continue to decrease each time. This is INCORRECT behavior (and is consistent with and without compiler optimizations).

I have done similar testing with an F28069 device on a Peripheral Explorer board, and I get CORRECT behavior for both int32 matrices and float32 matrices, so the problem occurs on F28027 but not on F28069. I realize that the F28027 does the floating-point math in software whereas the F28069 does the floating-point math in hardware, but this doesn't change the fact that the profile clock tool provides FALSE information after using CPU Reset followed by Restart only on the F28027.

Here is the first program (int32):

#include "F2802x_Device.h"

void main(void) {
	
	EALLOW;
	SysCtrlRegs.WDCR = 0x68;
	SysCtrlRegs.PLLSTS.bit.DIVSEL = 0;
	SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
	SysCtrlRegs.PLLCR.bit.DIV = 6;
	while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1);
	SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
	SysCtrlRegs.PLLSTS.bit.DIVSEL = 3;
	GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO2 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO3 = 1;
	EDIS;
	GpioDataRegs.GPASET.bit.GPIO0 = 1;
	GpioDataRegs.GPASET.bit.GPIO1 = 1;
	GpioDataRegs.GPASET.bit.GPIO2 = 1;
	GpioDataRegs.GPASET.bit.GPIO3 = 1;

	int32 j, m, n, p;

	int32 m3[5][5] = {							// first breakpoint
			{0 , 0 , 0 , 0 , 0},
			{0 , 0 , 0 , 0 , 0},
			{0 , 0 , 0 , 0 , 0},
			{0 , 0 , 0 , 0 , 0},
			{0 , 0 , 0 , 0 , 0} };

	const int32 m1[5][5] = {
			{1, 2, 3, 4, 5},
			{6, 7, 8, 9, 10},
			{11, 12, 13, 14, 15},
			{16, 17, 18, 19, 20},
			{21, 22, 23, 24, 25} };

	const int32 m2[5][5] = {
			{1, 2, 3, 4, 5},
			{6, 7, 8, 9, 10},
			{11, 12, 13, 14, 15},
			{16, 17, 18, 19, 20},
			{21, 22, 23, 24, 25} };

	for(j = 0; j < 100000; j++)
	{
		for(m = 0; m < 5; m++)
		{
			for(p = 0; p < 5; p++)
			{
				m3[m][p] = 0;
				for(n = 0; n < 5; n++)
				{
					m3[m][p] += m1[m][n] * m2[n][p];
				}
			}
		}
	}

	while(1)
	{
		GpioDataRegs.GPACLEAR.bit.GPIO0 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO1 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO2 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO3 = 1;	// second breakpoint
	}

}

Here is the second program (float32):

#include "F2802x_Device.h"

void main(void) {
	
	EALLOW;
	SysCtrlRegs.WDCR = 0x68;
	SysCtrlRegs.PLLSTS.bit.DIVSEL = 0;
	SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1;
	SysCtrlRegs.PLLCR.bit.DIV = 6;
	while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1);
	SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0;
	SysCtrlRegs.PLLSTS.bit.DIVSEL = 3;
	GpioCtrlRegs.GPADIR.bit.GPIO0 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO2 = 1;
	GpioCtrlRegs.GPADIR.bit.GPIO3 = 1;
	EDIS;
	GpioDataRegs.GPASET.bit.GPIO0 = 1;
	GpioDataRegs.GPASET.bit.GPIO1 = 1;
	GpioDataRegs.GPASET.bit.GPIO2 = 1;
	GpioDataRegs.GPASET.bit.GPIO3 = 1;

	int32 j, m, n, p;

	float32 m3[5][5] = {						// first breakpoint
			{0.0 , 0.0 , 0.0 , 0.0 , 0.0},
			{0.0 , 0.0 , 0.0 , 0.0 , 0.0},
			{0.0 , 0.0 , 0.0 , 0.0 , 0.0},
			{0.0 , 0.0 , 0.0 , 0.0 , 0.0},
			{0.0 , 0.0 , 0.0 , 0.0 , 0.0} };

	const float32 m1[5][5] = {
			{0.0001, 0.001, 0.01, 0.1, 1},
			{0.001, 0.01, 0.1, 1, 10},
			{0.01, 0.1, 1, 10, 100},
			{0.1, 1.0, 10, 100, 1000},
			{1, 10, 100, 1000, 10000} };

	const float32 m2[5][5] = {
			{0.0001, 0.001, 0.01, 0.1, 1},
			{0.001, 0.01, 0.1, 1, 10},
			{0.01, 0.1, 1, 10, 100},
			{0.1, 1.0, 10, 100, 1000},
			{1, 10, 100, 1000, 10000} };

	for(j = 0; j < 100000; j++)
	{
		for(m = 0; m < 5; m++)
		{
			for(p = 0; p < 5; p++)
			{
				m3[m][p] = 0;
				for(n = 0; n < 5; n++)
				{
					m3[m][p] += m1[m][n] * m2[n][p];
				}
			}
		}
	}

	while(1)
	{
		GpioDataRegs.GPACLEAR.bit.GPIO0 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO1 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO2 = 1;
		GpioDataRegs.GPACLEAR.bit.GPIO3 = 1;	// second breakpoint
	}

}

  • Hi David,

    This looks like an issue with the CCS profile clock tool on the F28027 specifically. 

    I am moving this to the CCS forum so that you may receive further support.


    Thank you,
    Brett

  • David,

    I have been able to reproduce this behavior and have submitted a bug report so it can be analyzed and addressed. The tracking # for this issue is SDSCM00050639. Feel free to track its status using the SDOWP link in my signature.

  • AartiG,

    I don't seem to be able to get my hands on this device atm, could you help by generating some DS logs while reproducing the issue? To generate the DS log, go to Help->CCS Support, select "Debug Server Log" and click on "Properties", check on the "Enable Debug Server Logging box" and choose a location for the log file. Please do this in a clean Session to avoid log polution.

    I have a 28069 so I can compare with your log to see the difference. From the description it sounds likely to be an emulation issue.

    Regards,

    Victor

  • Victor Yang said:
    I don't seem to be able to get my hands on this device atm, could you help by generating some DS logs while reproducing the issue?

    Sent the debug server logs offline.

  • Hi David, Aarti,

    I have located the cause of the issue. However the right fix is debatable and we will probably discuss it further internally to look for the best approach. Rest assured it should be fixed in the next CCS release.

    @David

    To fix your issue at hand, please replace the attached file in the following path : <ccs_install>\ccsv6\ccs_base\common\targetdb\modules\C28xNotVisible.xml

    1072.C28xNotVisible.xml
    <?xml version="1.0" encoding="UTF-8"?>
    <!-- 
      TI File $Revision: /main/1 $
      Checkin $Date: April 24, 2009   11:09:30 $
      -->
    <module id="Hidden" HW_revision="1" XML_version="1" description="" hidden="true" >
    
    	<register id="IC" acronym="IC" width="24" description="" />
    	<register id="FP" acronym="FP" width="16" description="" />
    	
    	<register id="RPTC" acronym="RPTC" width="16" description="" />
    	<register id="ACU_SEL" acronym="ACU_SEL" width="16" description="" />
    	<register id="DCU_SEL" acronym="DCU_SEL" width="16" description="" />
    	<register id="ECU_SEL" acronym="ECU_SEL" width="16" description="" />
    	<register id="ACUPSA_L32" acronym="ACUPSA_L32" width="32" description="" />
    	<register id="ACUPSA_M08" acronym="ACUPSA_M08" width="16" description="" />
    	<register id="ACUPSA_CNTL" acronym="ACUPSA_CNTL" width="16" description="" />
    	<register id="ACUPSA" acronym="ACUPSA" width="32" description="" />
    	<register id="ACUHWBPEVT_MASK" acronym="ACUHWBPEVT_MASK" width="32" description="" />
    	<register id="ACUHWBPEVT_REF" acronym="ACUHWBPEVT_REF" width="32" description="" />
    	<register id="ACUHWBPEVT_CNTL" acronym="ACUHWBPEVT_CNTL" width="16" description="" />
    	<register id="ACUHWBPEVT" acronym="ACUHWBPEVT" width="32" description="" />
    	<register id="ACUBUSEVT_MASK" acronym="ACUBUSEVT_MASK" width="32" description="" />
    	<register id="ACUBUSEVT_REF" acronym="ACUBUSEVT_REF" width="32" description="" />
    	<register id="ACUBUSEVT_CNTL" acronym="ACUBUSEVT_CNTL" width="16" description="" />
    	<register id="ACUBUSEVT" acronym="ACUBUSEVT" width="32" description="" />
    	<register id="ACUBENCHMARK_L32" acronym="ACUBENCHMARK_L32" width="32" description="" />
    	<register id="ACUBENCHMARK_M08" acronym="ACUBENCHMARK_M08" width="16" description="" />
    	<register id="ACUBENCHMARK_CNTL" acronym="ACUBENCHMARK_CNTL" width="16" description="" />
    	<register id="ACUBENCHMARK" acronym="ACUBENCHMARK" width="32" description="" />
    	<register id="ACU32CNT_CNT" acronym="ACU32CNT_CNT" width="32" description="" />
    	<register id="ACU32CNT_MATCH" acronym="ACU32CNT_MATCH" width="32" description="" />
    	<register id="ACU32CNT_CNTL" acronym="ACU32CNT_CNTL" width="16" description="" />
    	<register id="ACU32CNT" acronym="ACU32CNT" width="32" description="" />
    	<register id="ACU16CNT1_CNT" acronym="ACU16CNT1_CNT" width="16" description="" />
    	<register id="ACU16CNT2_CNT" acronym="ACU16CNT2_CNT" width="16" description="" />
    	<register id="ACU16CNT1_MATCH" acronym="ACU16CNT1_MATCH" width="16" description="" />
    	<register id="ACU16CNT2_MATCH" acronym="ACU16CNT2_MATCH" width="16" description="" />
    	<register id="ACU16CNT_CNTL" acronym="ACU16CNT_CNTL" width="16" description="" />
    	<register id="ACU16CNT" acronym="ACU16CNT" width="32" description="" />
    	<register id="ACUDMA_ADDR" acronym="ACUDMA_ADDR" width="32" description="" />
    	<register id="ACUDMA_DATA" acronym="ACUDMA_DATA" width="32" description="" />
    	<register id="ACUDMA_CNTL" acronym="ACUDMA_CNTL" width="16" description="" />
    	<register id="ACUDMA" acronym="ACUDMA" width="32" description="" />
    	<register id="DCUPSA_L32" acronym="DCUPSA_L32" width="32" description="" />
    	<register id="DCUPSA_M08" acronym="DCUPSA_M08" width="16" description="" />
    	<register id="DCUPSA_CNTL" acronym="DCUPSA_CNTL" width="16" description="" />
    	<register id="DCUPSA" acronym="DCUPSA" width="32" description="" />
    	<register id="DCUHWBPEVT_MASK" acronym="DCUHWBPEVT_MASK" width="32" description="" />
    	<register id="DCUHWBPEVT_REF" acronym="DCUHWBPEVT_REF" width="32" description="" />
    	<register id="DCUHWBPEVT_CNTL" acronym="DCUHWBPEVT_CNTL" width="16" description="" />
    	<register id="DCUHWBPEVT" acronym="DCUHWBPEVT" width="32" description="" />
    	<register id="DCU2BUSEVT_MASK" acronym="DCU2BUSEVT_MASK" width="32" description="" />
    	<register id="DCU2BUSEVT_REF" acronym="DCU2BUSEVT_REF" width="32" description="" />
    	<register id="DCU2BUSEVT_CNTL" acronym="DCU2BUSEVT_CNTL" width="16" description="" />
    	<register id="DCU2BUSEVT" acronym="DCU2BUSEVT" width="32" description="" />
    	<register id="DCUBUSEVT_MASK" acronym="DCUBUSEVT_MASK" width="32" description="" />
    	<register id="DCUBUSEVT_REF" acronym="DCUBUSEVT_REF" width="32" description="" />
    	<register id="DCUBUSEVT_CNTL" acronym="DCUBUSEVT_CNTL" width="16" description="" />
    	<register id="DCUBUSEVT" acronym="DCUBUSEVT" width="32" description="" />
    	<register id="ECU_CNTL" acronym="ECU_CNTL" width="16" description="" />
    	<register id="ECU" acronym="ECU" width="16" description="" />
    	<register id="ECU_EMU0" acronym="ECU_EMU0" width="32" description="" />
    	<register id="ECU_EMU1" acronym="ECU_EMU1" width="32" description="" />
    	<register id="ANASTOP" acronym="ANASTOP" width="32" description="" />
    	<register id="ANA_ENABLE" acronym="ANA_ENABLE" width="32" description="" />
    	<register id="PSTRT_XINTF" acronym="PSTRT_XINTF" width="32" description="" />
    	<register id="PEND_XINTF" acronym="PEND_XINTF" width="32" description="" />
    	<register id="DSTRT_XINTF" acronym="DSTRT_XINTF" width="32" description="" />
    	<register id="DEND_XINTF" acronym="DEND_XINTF" width="32" description="" />
    	<register id="MCTL_XINTF" acronym="MCTL_XINTF" width="32" description="" />
    	<register id="XDTIMING0" acronym="XDTIMING0" width="32" description="" />
    	<register id="XDTIMING1" acronym="XDTIMING1" width="32" description="" />
    	<register id="XDTIMING2" acronym="XDTIMING2" width="32" description="" />
    	<register id="XDTIMING3" acronym="XDTIMING3" width="32" description="" />
    	<register id="XDTIMING4" acronym="XDTIMING4" width="32" description="" />
    	<register id="XPTIMING0" acronym="XPTIMING0" width="32" description="" />
    	<register id="XPTIMING1" acronym="XPTIMING1" width="32" description="" />
    	<register id="XINTFCNF0" acronym="XINTFCNF0" width="32" description="" />
    	<register id="XINTFCNF1" acronym="XINTFCNF1" width="32" description="" />
    	<register id="XINTFCNF2" acronym="XINTFCNF2" width="32" description="" />
    	<register id="EMU_ENABLE" acronym="EMU_ENABLE" width="32" description="" />
    	<register id="SIDLE" acronym="SIDLE" width="16" description="" />
    	<register id="VMAP_IN" acronym="VMAP_IN" width="16" description="" />
    	<register id="M0M1MAP_IN" acronym="M0M1MAP_IN" width="16" description="" />
    	<register id="PROTSTART" acronym="PROTSTART" width="16" description="" />
    	<register id="PROTRANGE" acronym="PROTRANGE" width="16" description="" />
    	<register id="ENPROT" acronym="ENPROT" width="16" description="" />
    	<register id="XAR6L" acronym="XAR6L" width="16" description="" />
    	<register id="XAR6H" acronym="XAR6H" width=" 16" description="" />
    	<register id="XAR7L" acronym="XAR7L" width="16" description="" />
    	<register id="XAR7H" acronym="XAR7H" width="16" description="" />
    	<register id="XAR0L" acronym="XAR0L" width="16" description="" />
    	<register id="XAR0H" acronym="XAR0H" width="16" description="" />
    	<register id="XAR1L" acronym="XAR1L" width="16" description="" />
    	<register id="XAR1H" acronym="XAR1H" width="16" description="" />
    	<register id="XAR2L" acronym="XAR2L" width="16" description="" />
    	<register id="XAR2H" acronym="XAR2H" width="16" description="" />
    	<register id="XAR3L" acronym="XAR3L" width="16" description="" />
    	<register id="XAR3H" acronym="XAR3H" width="16" description="" />
    	<register id="XAR4L" acronym="XAR4L" width="16" description="" />
    	<register id="XAR4H" acronym="XAR4H" width="16" description="" />
    	<register id="XAR5L" acronym="XAR5L" width=" 16" description="" />
    	<register id="XAR5H" acronym="XAR5H" width="16" description="" />
    	<register id="AL" acronym="AL" width="16" description="" />
    	<register id="AH" acronym="AH" width="16" description="" />
    	<register id="AR0" acronym="AR0" width="16" description="" />
    	<register id="AR1" acronym="AR1" width="16" description="" />
    	<register id="AR2" acronym="AR2" width="16" description="" />
    	<register id="AR3" acronym="AR3" width="16" description="" />
    	<register id="AR4" acronym="AR4" width="16" description="" />
    	<register id="AR5" acronym="AR5" width=" 16" description="" />
    	<register id="AR6" acronym="AR6" width="16" description="" />
    	<register id="AR7" acronym="AR7" width="16" description="" />
    	<register id="DECODE2" acronym="DECODE2" width="32" description="" />
    	<register id="READ1" acronym="READ1" width="32" description="" />
    	<register id="READ2" acronym="READ2" width="32" description="" />
    	<register id="EXECUTE" acronym="EXECUTE" width="32" description="" />
    	<register id="WRITE" acronym="WRITE" width="32" description="" />
    	<register id="D2_INSTR" acronym="D2_INSTR" width="32" description="" />
    	<register id="R1_INSTR" acronym="R1_INSTR" width="32" description="" />
    	<register id="R2_INSTR" acronym="R2_INSTR" width="32" description="" />
    	<register id="EX_INSTR" acronym="EX_INSTR" width="32" description="" />
    	<register id="WR_INSTR" acronym="WR_INSTR" width="32" description="" />
    	<register id="CLK" acronym="CLK" width="64" description="" />
    	<register id="RUNCOUNT" acronym="RUNCOUNT" width="32" description="" />
    	<register id="XDS_STAT" acronym="XDS_STAT" width="32" description="" />
    	<register id="XDS_DFR" acronym="XDS_DFR" width="32" description="" />
    	<register id="XDS_DBGM" acronym="XDS_DBGM" width="32" description="" />
    	<register id="XDS_HPI" acronym="XDS_HPI" width="32" description="" />
    	<register id="XDS_IDMATCH" acronym="XDS_IDMATCH" width="32" description="" />
    	<register id="XDS_PREEMPT" acronym="XDS_PREEMPT" width="32" description="" />
    	<register id="XDS_MFREG1" acronym="XDS_MFREG1" width="32" description="" />
    	<register id="XDS_DCSTRBS" acronym="XDS_DCSTRBS" width="32" description="" />
    	<register id="XDS_ANASEIZE" acronym="XDS_ANASEIZE" width="32" description="" />
    	<register id="XDS_DFRCHANGE" acronym="XDS_DFRCHANGE" width="32" description="" />
    	<register id="XDS_CLKFIX" acronym="XDS_CLKFIX" width="32" description="" />
    	<register id="XDS_DLFIFOSZ" acronym="XDS_DLFIFOSZ" width="32" description="" />
    	<register id="XDS_MSGFIFOSZ" acronym="XDS_MSGFIFOSZ" width="32" description="" />
    	<register id="XDS_RTDX_ENABLE" acronym="XDS_RTDX_ENABLE" width="32" description="" />
    
    </module>
    

    Regards,

    Victor