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Pre-build steps performed before AND AFTER gmake in CCS 5.5

Hi

I've just updated from CCS 5.3 to CCS 5.5. I note that now, in CCS 5.5, my pre-build batch file is run prior to the gmake. and also AGAIN AFTER the post-build batch file I have defined!

CCS 5.3 didn't do this. Any ideas?

Regards, Tony.

  • Tony,

    I don't think I've heard of such an issue in CCS 5.5. Would you be able to share a simple project that demonstrates this behavior?

  • Hi Aarti,

    I've just created a brand new project, and added pre and post build batch files. On build, that seemd okay, each was run only once. I then added a makefile.targets and this provoked the running of the pre build batch file again at the end of build. I've attached a zip file of the project. There's nothing to it really.

    5633.PreBuildTwice.zip

    Console output is:

    **** Build of configuration Debug for project PreBuildTwice ****

    "C:\\ti\\ccsv5\\utils\\bin\\gmake" -k all
    copy ..\main.c main.copy
    1 file(s) copied.
    "C:/Users/tony.morrell/Workspaces/CCS5.3/PreBuildTwice/PreBuild.bat"
    ===== PreBuild =====
    ===== PreBuild Complete 2014/07/28 9:00:08.20 =====
    ' '
    'Building file: ../main.c'
    'Invoking: ARM Compiler'
    "C:/ti/ccsv5/tools/compiler/arm_5.1.7/bin/armcl" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi --include_path="C:/ti/ccsv5/tools/compiler/arm_5.1.7/include" -g --diag_warning=225 --display_error_number --diag_wrap=off --enum_type=packed --preproc_with_compile --preproc_dependency="main.pp" "../main.c"
    'Finished building: ../main.c'
    ' '
    'Building target: PreBuildTwice.out'
    'Invoking: ARM Linker'
    "C:/ti/ccsv5/tools/compiler/arm_5.1.7/bin/armcl" -mv7R4 --code_state=32 --float_support=VFPv3D16 --abi=eabi -g --diag_warning=225 --display_error_number --diag_wrap=off --enum_type=packed -z -m"PreBuildTwice.map" --heap_size=0x800 --stack_size=0x800 -i"C:/ti/ccsv5/tools/compiler/arm_5.1.7/lib" -i"C:/ti/ccsv5/tools/compiler/arm_5.1.7/include" --reread_libs --warn_sections --display_error_number --diag_wrap=off --xml_link_info="PreBuildTwice_linkInfo.xml" --rom_model --be32 -o "PreBuildTwice.out" "./main.obj" -l"rtsv7R4_T_be_v3D16_eabi.lib"
    <Linking>
    'Finished building target: PreBuildTwice.out'
    ' '
    "C:/Users/tony.morrell/Workspaces/CCS5.3/PreBuildTwice/PostBuild.bat"
    ===== PostBuild =====
    ===== PostBuild Complete 2014/07/28 9:00:08.76 =====
    ' '
    "C:/Users/tony.morrell/Workspaces/CCS5.3/PreBuildTwice/PreBuild.bat"
    ===== PreBuild =====
    ===== PreBuild Complete 2014/07/28 9:00:08.80 =====
    ' '

    **** Build Finished ****

    Regards, Tony.

  • Tony Morrell said:
    I've just created a brand new project, and added pre and post build batch files. On build, that seemd okay, each was run only once. I then added a makefile.targets and this provoked the running of the pre build batch file again at the end of build.

    I can reproduce this behavior, but I am curious do you really need the makefile.targets now that CCSv5.4 and higher already respect the pre-build dependency? (as per your other thread: http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/p/356074/1256571.aspx#1256571)

    In the newer versions of CCS, the pre-build should always run prior to main-build.

  • Hi Aarti,

    I use the pre-build batch file to move things around but it is now practically empty. I need the makefile.targets to perform build functions on files outside scope of the compiler/linger gmake makefile, so for example I run GNU Octave to process various script files, and I also have a couple of HET programs to assemble. These operations need the make dependency checker so that they are only performed if the input file has changed.

    Regards, Tony,

  • Hi Aarti,

    I'm sorry but I have another question related to this. My makefile.targets does not execute without having something defined for the pre-build step. This seems a bit strange. Do I need to do something else to get makefile.targets to run? I thought that its very existence was enough.

    Regards, Tony.

  • Hi Tony,

    If I comment out the first line in your makefile.targets file:

    # main-build: pre-build

    ...then the pre-build step is executed only once, as expected.  As Aarti mentioned, CCS now runs the pre-build step as a separate "make" invocation, to ensure that it runs before the main-build in all cases.  So the rule above should no longer be necessary.

    Also, to answer your second question - the makefile.targets file is simply included in the main makefile (see the bottom of your Debug/makefile).  It is included always, but whether its rules run or not, depends on the rules themselves.  Your rules make references to the "pre-build" make-target, but this target only gets generated iff there is a pre-build step defined.

    Thanks,

    - Baltasar

  • Hi Baltasar,

    Thanks for the explanation regarding why my pre-build runs twice, I hadn't appreciated Aarti's point about the pre-build step being run as a separate make invocation. I too have removed the main-build: pre-build step and all is well in that respect.

    As to makefile.targets not being performed without a pre-build step defined, my makefile.targets has a forced rule as below and so should be invoked every time, but it isn't. As:

    main-build: main.copy

    main.copy: ..\main.c FORCE
    copy ..\main.c main.copy

    FORCE:

    or even more simply (without 'main-build: main.copy') as:

    main.copy: ..\main.c FORCE
    copy ..\main.c main.copy

    FORCE:

    Regards, Tony 

  • Hi Tony,

    I think your second rule would only run iff the main.copy file doesn't physically exist.  If you want it to run regardless of whether the file exists or not, try changing the second rule to:

    FORCE:
       copy ..\main.c main.copy

    ...and remove the empty "FORCE:" rule.

    Also, the "main-build" target is only defined when there is a pre-build step.  If you wish that your rule runs regardless of whether there is a pre-build step or not, try changing the first rule to "all: FORCE".

    Thanks,

    - Baltasar

  • Hi Baltasar,

    In my real code, the FORCEd rule does occur all the time. I see your point about "main-build" target not being defined if there is no pre-build step, so this explains why my makefile.targets does not run without a pre-build step being defined.

    The issue I have now is that my source code has dependencies on the outputs of my makefile.targets. As these dependencies are not known about in the makefile then gmake does not invoke makefile.targets until after the rules in makefile have been run.

    How can I get my makefile.targets rules to be run before those in makefile?

    I've attached a copy of my makefile.targets for you to have a look at. The rule for SVNinfo.inc must always be performed for every build, the other rules must be performed if they have changed, and before makefile rules are performed.

    {attachment removed by author}

    Regards, Tony.

  • Hi Tony,

    I think you'd get the behaviour you want if you define a pre-build step through the project Properties, and then in your makefile.targets list your make-target as a pre-requisite to the "pre-build" target...i.e. "pre-build: my-target".  

    - Baltasar

  • Hi Baltasar,

    Yes, that's what I've had to do to get round the issue. This pre-build step then actually does nothing.

    It just means I've got this otherwise redundant build step, not a big issue really, just a bit untidy.

    Thanks for all your help.

    Regards, Tony.