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CCS 6.01 OMAP5432

Markus Medau
Prodigy 90 points

Hi,

connected the SVTRONICS OMAP5432 EVM Board to an XDS100V2 JTAG emulator.

I click on "New CCS Project", select target: OMAP5, OMAP5432_UEVM, select connection: Texas Instruments XDS100v2 USB Emulator, next I hit the "Verify" button.

Now I get this (I'm pretty sure all the connections are made on the JTAG): - any ideas?

Thanks,

Markus

[Start]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

C:\DOCUME~1\Ploytec\LOCALS~1\APPLIC~1\TEXASI~1\
CCS\ti\0\0\BrdDat\testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'May 21 2014'.
The library build time was '17:19:59'.
The library package version is '5.1.507.0'.
The library component version is '35.34.40.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[The log-file for the JTAG TCLK output generated from the PLL]----------

There is no hardware for programming the JTAG TCLK frequency.

-----[Measure the source and frequency of the final JTAG TCLKR input]--------

There is no hardware for measuring the JTAG TCLK frequency.

-----[Perform the standard path-length test on the JTAG IR and DR]-----------

This path-length test uses blocks of 512 32-bit words.

The JTAG IR instruction path-length was not recorded.

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 512 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0

-----[An error has occurred and this utility has aborted]--------------------

This error is generated by TI's USCIF driver or utilities.

The value is '-183' (0xffffff49).
The title is 'SC_ERR_CTL_CBL_BREAK_FAR'.

The explanation is:
The controller has detected a cable break far-from itself.
The user must connect the cable/pod to the target.

[End]

  • 0
    TI__Guru**** 420520 points

    Hello

    Markus Medau said:
    connected the SVTRONICS OMAP5432 EVM Board to an XDS100V2 JTAG emulator.

    Are you using an external XDS100v2 connected to the JTAG header on the EVM? If so, please check the hardware connections. The error you are seeing is a basic error where basic JTAG connectivity is failing. In many cases, it is a hardware issue where there are poor connections with the target JTAG header or missing pins and so-forth.

    Thanks

    ki

  • 0 in reply to Ki
    Prodigy 90 points

    TDIS seems to need a connection, too. Is there any soldering instructions or official adapter for this? Now I'm getting this:

    -----[Measure the source and frequency of the final JTAG TCLKR input]--------

    There is no hardware for measuring the JTAG TCLK frequency.

    -----[Perform the standard path-length test on the JTAG IR and DR]-----------

    This path-length test uses blocks of 512 32-bit words.

    The test for the JTAG IR instruction path-length failed.
    The JTAG IR instruction scan-path is stuck-at-zero.

    The test for the JTAG DR bypass path-length failed.
    The JTAG DR bypass scan-path is stuck-at-zero.

    -----[Perform the Integrity scan-test on the JTAG IR]------------------------

    This test will use blocks of 512 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    The details of the first 8 errors have been provided.
    The utility will now report only the count of failed tests.
    Scan tests: 1, skipped: 0, failed: 1
    Do a test using 0x00000000.
    Scan tests: 2, skipped: 0, failed: 1
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 2
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 3
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 4
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 5
    Some of the values were corrupted - 83.3 percent.

    The JTAG IR Integrity scan-test has failed.

    -----[Perform the Integrity scan-test on the JTAG DR]------------------------

    This test will use blocks of 512 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Test 1 Word 0: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 1: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 2: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 3: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 4: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 5: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 6: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    Test 1 Word 7: scanned out 0xFFFFFFFF and scanned in 0x00000000.
    The details of the first 8 errors have been provided.
    The utility will now report only the count of failed tests.
    Scan tests: 1, skipped: 0, failed: 1
    Do a test using 0x00000000.
    Scan tests: 2, skipped: 0, failed: 1
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 2
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 3
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 4
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 5
    Some of the values were corrupted - 83.3 percent.

    The JTAG DR Integrity scan-test has failed.

    [End]

    Is the OMAP5432 EVM Board supposed to work with XDS100V2 JTAG?

    Also, there is something strange about my fresh CCS 6.01 installation: When I click on "Check for Updates", It finds a dozen updates, but then tells me "Searching alternate solutions..." has encountered a problem. No remedy found.

    -Markus

  • 0 in reply to Markus Medau
    Prodigy 90 points

    I figured it out - the brand new XDS100V2 JTAG had a short in the ribbon cable. After fixing this, the initial test succeeds, but when I set up a project, I'm getting:

    "Error connecting to target: Error -2062 @034bc Unable to halt device."

    Any ideas?

  • 0 in reply to Markus Medau
    Prodigy 90 points

    Is the OMAP5432 EVM Board supposed to work with XDS100V2 JTAG?

  • 0 in reply to Markus Medau
    TI__Guru**** 168267 points

    Hi,

    Markus Medau said:
    "Error connecting to target: Error -2062 @034bc Unable to halt device."

    Are you running Linux or any other OS on the board? Sometimes these OSes either power down or inhibit the JTAG debugger from connecting and controlling the Cortex cores. In this case, either connecting CCS without any OS loaded or at the u-boot prompt should grant you access to the core.

    Unfortunately I don't have a SVTronics OMAP5432 with me, but I have previous incarnations of this kit that were easily connected using any of our JTAG debuggers.

    Hope this helps,

    Rafael

  • 0 in reply to desouza
    Prodigy 90 points

    I removed the (Linux) SD Card, so the board is in bootloader trying to find a bootable device. (Of course there is none.)

    Is it possible I still have a connection prob, though the initial test runs through?