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Multicore debugging linker configuration
For chips on which there are more than one processor cores, for example, an ARM and a DSP, should we manually configure the link.cmd so that the loading and running address of programs on different cores don't overlap? Should we create two different CCS projects, each for one of the cores? And besides manually setting each's cmd file so that the mapping don't overlap, is there a way to coordinate this work in CCS?
And when programs are launched, frequently there is a need to let one core halts/resumes code execution on another. I guess this should be done by:
1. to halt another core: change that core's program counter to point to "IDLE", save the current next program counter, or an infinite loop like while(1).
2. to resume another core, simply restore the saved program counter.
Is this the general paradigm? But does there exist a location in the firmware for the "IDLE" instruction, and that I should point the next program counter to that, or it is better to just point to something like a while(1) infinite loop which I wrote myself?
Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages. Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics.
Your question has nothing to do with our compiler, other than you want to compile some programs that will run on different cores and want to figure out what to do with them. So it should be posted somewhere else.
But I am not sure where that "somewhere else" is. You are asking intellectually interesting questions, but that is really not why we have this forum. If you are trying to learn how to do multi-processor programming, you will get better results from one of many online universities or taking real university courses. I doubt we can compete well with the expertise at the many colleges around the world where this science is being developed.
At TI, we try to learn from those same sources and then apply what we learn. But we are not in a position to provide that level of training.
If your questions reduce down to how to use the Code Composer Studio platform for debug, then the Code Composer Forum might be your best place to find specific answers. But your questions are more theoretical than how-to-use the tools.
Please search the TI Wiki Pages for multi-core and multi-processor debug pages. I wrote one based on the C6472 and CCSv4 named Using DSP/BIOS on Multi-Core DSP Devices which mentions some multi-core debugging techniques. You will find others using better search terms, and also will find good information on the broader web search. If you come up with some insights, please let us know your opinions.
If you have specific questions about our devices or tools, please ask them in the forum that best matches the topic. Or let us know where you would like this thread moved for you.
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I read the links and has got some basic ideas. I am going to look at some further examples.
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