Part Number: CC430F5135
Tool/software: TI C/C++ Compiler
In section 7.2 of the MSP430 GCC User's Guide (Rev. C), there is a "critical" attribute that is documented as "Disable interrupts on entry, and restore the previous interrupt state on exit." When I compile an ISR with this attribute, it adds a push r2; dint; nop to the beginning of the ISR and additional instructions at the end to undo this.
However, in Section 18.104.22.168 Interrupt Acceptance in the MSP430x5xx Family User's Guide (Rev. Q), it specifies that before entry into the user ISR, "3. The SR is pushed onto the stack." Further, "6. All bits of SR are cleared except SCG0, thereby terminating any low-power mode. Because the GIE bit is cleared, further interrupts are disabled."
This makes the critical attribute in MSP430 GCC seem redundant. Can someone explain this redundancy here? When should I ever mark a ISR critical?
I don't know. So, I filed the entry MSPGCC-93 in the SDOWP system. You are welcome to follow this entry with the SDOWP link below in my signature. This should either result in the critical attribute being removed, or an explanation given as to when it is useful.
Thanks and regards,
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