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TI c674 compiler cl6x -g option performance impact

jiang peng
Prodigy 90 points

May I know what is the performance impact when enable the -g option in TI c674 compiler cl6x?

does TI has any data for that?

we need enable the debug options, but not sure what is the impacts, including the size, MIPS etc

the compiler version is V7.0.4 and the format is COFF.

thanks

Jiang peng

  • 0
    TI__Guru**** 232700 points

    The important point is that building with -g does not disable software pipelining.  Software pipelining is the key optimization technique deployed in the C6000 compiler.

    jiang peng said:
    does TI has any data for that?

    No.  I would expect CPU cycle count (which ignores cycles lost to memory latency, cache effects, etc) to increase around 10-20%.

    You can lower this cycle count increase by using the option --optimize_with_debug.

    To other readers of this thread ... A relatively old compiler is being used here.  If you are using a newer compiler, much of what you see here does not apply.  Please see this wiki article.

    Thanks and regards,

    -George