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cinit placement fails

Other Parts Discussed in Thread: SYSBIOS

Hi,

CCS 5.4 on linux. pdk 1.1.1.2.5 mcsdk 2.01.02.05

on a c6657 platform with 128MB RAM we successfully build our application in under 60MB (origin is 0x80000400). See the final few lines of the map file.

83ac7dc0 ti_sysbios_family_c64p_Hwi_int14
83ac7de0 ti_sysbios_family_c64p_Hwi_int15
83ac7e00 ddr3_group_end
83be345c __TI_Handler_Table_Base
83be3468 __TI_Handler_Table_Limit
83be34d8 __TI_CINIT_Base
83be3578 __TI_CINIT_Limit
83be3578 __TI_UNWIND_TABLE_START
83be3578 ddr3_cinit_end
83be6168 __TI_UNWIND_TABLE_END

Note that cinit resides in ~ 1M (ddr3_group_end to ddr3_cinit_end)

I now need the upper 64MB for core1. So I'm reducing the memory available for linking this app by lowering the length of the memory section that we locate into. This produces a linker error that seems to indicate an unfeasibly large .cinit section? (which can't be true given the map file above)

<Linking>
18/.make.tmp/net_dsp/bios/Debug/linker.cmd.pp", line 274: error #10099-D:
program will not fit into available memory. placement with alignment fails
for section ".cinit" size 0x30e5651 . Available memory ranges:
DDR3 size: 0x5fffc00 unused: 0x24343c3 max hole: 0x243434c
error #10010: errors encountered during linking; "dsp.out" not built

Part of our sections.xdt: (DDR3 is defined as 0x80000400 length 0x5FFFC00 for a failed link) where we locate the main text,data (part of a group) then the heap and cinit

...

} load = DDR3, align = 0x8, LOAD_END(ddr3_group_end)

.entry: load >> ENTRY

.sys_heap: > DDR3, align = 0x100

.cinit: > DDR3, LOAD_END(ddr3_cinit_end)
.ddr3end: > DDR3 (HIGH), LOAD_END(ddr3_top)

Any thoughts on why this happens?

 

Thanks