Hi,
I'm using TI DSP C6678.
For 4byte memcpy with unaligned source address, 2 least significant address bits are cleared to 0.
For example:
memcpy(&A, &B, 4);
The assembly code generated code is like this:
LDW .D2T2 *B11,B5 ; |2497|
ADDAW .D2 SP,18,B4 ; |2497|
NOP 3
STW .D2T2 B5,*B4 ; |2497|
At this time, If B11 = 0x90800036, actually 4bytes start from 0x90800034 are read to B5
I found other people had the same problem: http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/190185.aspx
I tried to cast source address to uint8_t*, but the same assembly code were generated.
Currently we cannot gurantee all our memcpy() source addresses are aligned to 4 bytes. Please give us suggestions on this problem, thanks.