read write to shared memory

Moving this to the C6A forum.

Raunak,

Raunak Kalani said:

I meant the memory that is shared between the DSP and ARM core

L3 OCMC RAM can be shared between DSP and ARM core. DDR3 memory can be shared between DSP and ARM core. Or you mean other memory? Which exactly? Which is the start address of this memory?

Note also the hardware spinlocks can be used to facilitate access to shared resources.

See the below resources for reference:

DM816x Silicon errata, advisory 2.1.34 - there is example with MMU and shared memory (OCMC RAM and DDR)

DM816x TRM, sections 1.12.4.3 and 1.14 - for more details regarding spinlocks

DM816x TRM, section 1.12.3.1 - DDR3 is used for shared memory

Regards,
Pavel