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Allocating large array in external memory

Other Parts Discussed in Thread: TMS320C6657, SYSBIOS

I am trying to create a large array in off-chip memory as follows:

#pragma SET_DATA_SECTION("ext_ram")

uint32_t big_array[0x200000];

#pragma SET_DATA_SECTION()

Where ext_ram is a section in external DDR memory.

The problem is the linker fails with an insufficient memory error.  This is because it is trying to allocate 0x200000 words in the .cinit section in addition to the array itself in external memory.  How can I resolve this?

  • Which target ISA are you using? Are you using EABI or COFF ABI? Are you using --ram_model or --rom_model?
  • C6657. EABI. rom model.
  • Clifford Chase said:
    The problem is the linker fails with an insufficient memory error.  This is because it is trying to allocate 0x200000 words in the .cinit section in addition to the array itself in external memory.  How can I resolve this?

    First, please read the first part of this wiki article about linker command files.  Please be sure to understand the distinction between the terms input section, output section, and memory range.

    Clifford Chase said:
    #pragma SET_DATA_SECTION("ext_ram")

    I suspect that ext_ram is the name of a memory range in your linker command file.  And you expect this directive to cause big_array to be allocated to that memory range.  Is that correct?  If this presumption is wrong, then the rest of this post is also wrong.

    That pragma names the input section that big_array goes into.  You can allocate big_array into the memory range ext_ram, but not in this manner.

    Consider these changes.  To avoid confusion, change the name used to something like ...

    #pragma SET_DATA_SECTION("os_big_array"); // output section for big array

    Then in your linker command file, inside the SECTIONS directive, write ...

        os_big_array > ext_ram

    This line causes the input section os_big_array (and there's only one) to be collected into an output section also named os_big_array, then that output section is allocated to the memory range ext_ram.

    Thanks and regards,

    -George

  • Under EABI, this array is supposed to be zero-initialized. This is usually accomplished by a zero-init .cinit entry, which is very compact; for this array, you should only get about 8 bytes of .cinit used.

    Are you using any options like --cinit_compression or --zero_init=off ?
  • Looks like good advice except for the fact that the CCS does not allow you to edit linker command files. In fact, CCS seems to steer you away from trying to do anything with linker command files. It even locks them so you can't edit them outside the environment. In fact the start of the linker.cmd file contains:

    /*
    * Do not modify this file; it is automatically generated from the template
    * linkcmd.xdt in the ti.targets.elf package and will be overwritten.
    */
  • I'm not using any of those options. I'm using the default settings when the project was first created. The .cinit entry is the same size as the array.
  • Clifford,
    that's a message from XDCtools and it applies to the generated linker command file. However, you are free to add your own linker command file in the top of the project with the only content being:
    SECTIONS {
    os_big_array > ext_ram
    }
  • Doesn't fix the problem. Here is the generated linker command file:


    /*
    * Do not modify this file; it is automatically generated from the template
    * linkcmd.xdt in the ti.targets.elf package and will be overwritten.
    */

    /*
    * put '"'s around paths because, without this, the linker
    * considers '-' as minus operator, not a file name character.
    */


    -l"C:\Users\Cliff\workspace_v6_1_3\hello_TMS320C6657\Debug\configPkg\package\cfg\hello_pe66.oe66"
    -l"C:\Users\Cliff\workspace_v6_1_3\hello_TMS320C6657\src\sysbios\sysbios.ae66"
    -l"C:\ti\bios_6_45_01_29\packages\ti\targets\rts6000\lib\ti.targets.rts6000.ae66"
    -l"C:\ti\bios_6_45_01_29\packages\ti\targets\rts6000\lib\boot.ae66"

    --retain="*(xdc.meta)"


    --args 0x0
    -heap 0x0
    -stack 0x1000

    MEMORY
    {
    L2SRAM (RWX) : org = 0x800000, len = 0x100000
    MSMCSRAM (RWX) : org = 0xc000000, len = 0x100000
    DDR3 : org = 0x80000000, len = 0x20000000
    }

    ...

    SECTIONS
    {
    .text: load >> L2SRAM
    .ti.decompress: load > L2SRAM
    .stack: load > L2SRAM
    GROUP: load > L2SRAM
    {
    .bss:
    .neardata:
    .rodata:
    }
    .cinit: load > L2SRAM
    .pinit: load >> L2SRAM
    .init_array: load > L2SRAM
    .const: load >> L2SRAM
    .data: load >> L2SRAM
    .fardata: load >> L2SRAM
    .switch: load >> L2SRAM
    .sysmem: load > L2SRAM
    .far: load >> L2SRAM
    .args: load > L2SRAM align = 0x4, fill = 0 {_argsize = 0x0; }
    .cio: load >> L2SRAM
    .ti.handler_table: load > L2SRAM
    .c6xabi.exidx: load > L2SRAM
    .c6xabi.extab: load >> L2SRAM
    ext_ram: load > DDR3
    .vecs: load > L2SRAM
    xdc.meta: load > L2SRAM, type = COPY

    }




    DDR3 is my external DDR3 memory. ext_ram is a section that I've instructed to load into DDR3. big_array IS being allocated in external memory. If I make the array smaller it's address is in DDR3. The problem is that the .cinit section grows by the same size as the array so if I make the array big .cinit is too big and linkage fails.
  • Please generate and post your linker map file (linker option --map_file)