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optimization option did not work in CCS 6.13

Other Parts Discussed in Thread: CCSTUDIO

Hi everyone,

I am using CCS 6.13 for my project. I was unable to make optimization option work. here is my setting in CCS:

it seems the configuration is done, but it did not seems to work. I had this issue when I used debug mode, and it worked when I used Release mode.( the execution time of one of my fuctions significantly reduced when it is working.).  Now even if in Release model, it is not working any more. the performance advice file says the -g should be removed. as you can see in second image, no -g option there.  following is the part of the performance advice file:

---------------------------------------------------------------------------------

;* *
;* processors.wiki.ti.com/.../C6000 *
;* *
;* or by searching for `Advice #<advice_id>`. *
;* *
;* Warning: This file is auto generated by the compiler and can be *
;* overwritten during the next compile. *
;* *
;******************************************************************************
;* User Options: --abi=coffabi --opt_for_space=2 --opt_for_speed=5 --opt_level=3 --preproc_macros=C:/eHDT_wk_bin_4/.metadata/.plugins/org.eclipse.core.resources/.projects/eHDT_DSP/com.ti.ccstudio.project.core/Release/symbols.txt --silicon_version=6740 --symdebug:dwarf


"C:/ti_CCS6/ccsv6/eclipse/configuration/org.eclipse.osgi/361/0/.cp/resources/scannerInfoCollector/main.c": advice #27003:
Detecting compilation with debug option -g, which hinders optimization. To
optimize, remove -g or compile with --optimize_with_debug_option.
"../src/Baudot.c": advice #27003: Detecting compilation with debug option -g,
which hinders optimization. To optimize, remove -g or compile with
--optimize_with_debug_option.
"../src/Baudot.c", line 114: advice #30009: If you know that this loop will
always execute at a multiple of <2> and at least <2> times, try adding
"#pragma MUST_ITERATE(2, ,2)" just before the loop.
"../src/Baudot.c", line 289: advice #30000: Loop at line 287 cannot be
scheduled efficiently, as it contains a function call ("_BdtDemod"). Try to
inline call or consider rewriting loop.
"../src/Baudot.c", line 293: advice #30003: Loop at line 287 cannot be
scheduled efficiently, as it contains complex conditional expression. Try to
simplify condition.
"../src/BdtDemod.c": advice #27003: Detecting compilation with debug option -g,
which hinders optimization. To optimize, remove -g or compile with
--optimize_with_debug_option.

--------------------------------------------------------------------------------------------------

what could prevent optimization option working?

your help is highly appreciated!

Ron

  • The build options you show in the screen shot and those you show from the automatically generated performance information file ...

    Rong Wang2 said:
    ;* User Options: --abi=coffabi --opt_for_space=2 --opt_for_speed=5 --opt_level=3 --preproc_macros=C:/eHDT_wk_bin_4/.metadata/.plugins/org.eclipse.core.resources/.projects/eHDT_DSP/com.ti.ccstudio.project.core/Release/symbols.txt --silicon_version=6740 --symdebug:dwarf

    ... do not match.  Note that --symdebug:dwarf is the same as using -g.  I'm not sure how this mismatch occurs.  Are you looking at the correct performance file?  According to the build options in the screen shot, the performance file from this build is C:\temp\performance_file (no extension).  

    Thanks and regards,

    -George

  • Thank you very much for your help!.

    sorry, I copied wrong performance file. here are the new one. It looks the -g is gone, but the performance is still not improved.

    I just have a simple loop funciton as below. but the execution time is about 40 micro seconds. I tried to set optimication in CCS and it did not work when it is Debug mode. after I changed to Release mode, then it worked, the execution time was reduced to 2 micro seconds. but after I add more code in my project and did not change optimization, I fund the execution time for this function back to 40 micro seconds again. I did not any anything on this funciton. following is the function code, and CCS setting.  attached is performation file. what could prevent optimication working?  

    void Matrice(void){

    uint16_t i,k;
    int32_t accumulator;
    #pragma MUST_ITERATE(1,14 , 1)

              for(i=0;i<14;i++)
              {
                   accumulator=0;
                   #pragma MUST_ITERATE(1,21 , 1)
                   for(k=0;k<22;k++)
                   {
                           if(MatriceInterne[i][k]==1)
                           {
                               accumulator += matrice_data_input[k];
                           }
                    }
                   matrice_data_output[i]= accumulator;
               }
       }

    -----------------------------------------------------------------------------------

    -------------------------------------------------------------------------------------

  • The code you show is incomplete.  For instance, it does not show the declarations of the arrays MatriceInterne, matrice_data_input, or matrice_data_output.  I had to guess at those details to get something that builds.  When I build with the options you show, I get what I think are very good results.  I cannot run it, so I cannot know how fast it runs.

    Please submit the preprocessed form of the source file which contains the function Matrice.  That avoids the guesses I had to make.  

    Rong Wang2 said:
    I changed to Release mode, then it worked, the execution time was reduced to 2 micro seconds

    To know whether the assembly code I generate has the same performance as this ... Please build this way again, but add the options --debug_software_pipeline and --src_interlist.  These options tell the compiler to not delete the generated assembly file, add yet more information to the comment block inserted before every software pipelined loop, and add comments that aid in understanding the assembly code.  Then attach that assembly file to your next post.  Add the file extension .txt to it, so the forum does not reject it.  To better understand those options, please look them up in the C6000 compiler manual.

    Thanks and regards,

    -George

  • Hi George,

    Attached are the files I used in my test including main, matrice and cmd file. the asm files and screen shot for configuration and test result are also attached.

    thank you som much for your help!

    2783.linker_dsp.txt
    /* linker_dsp.cmd */
    
    -stack           0x000001000
    -heap            0x00010000
    
    MEMORY
    {
       dsp_l2_ram:      ORIGIN = 0x11800000  LENGTH = 0x00040000
       shared_ram:      ORIGIN = 0x80000000  LENGTH = 0x00020000
       external_ram:    ORIGIN = 0xC0000000  LENGTH = 0x08000000
    }
    
    SECTIONS
    {
       .text       > dsp_l2_ram
       .const      > dsp_l2_ram
       .bss        > dsp_l2_ram
       .far        > dsp_l2_ram
       .switch     > dsp_l2_ram
       .stack      > dsp_l2_ram
       .data       > dsp_l2_ram
       .cinit      > dsp_l2_ram
       .sysmem     > dsp_l2_ram
       .cio        > dsp_l2_ram
       .vecs       > dsp_l2_ram
       .EXT_RAM    > external_ram
    }
    
    5516.main.txt
    *
    ;---------------- Intrado Canada Inc --------------------
    ;
    ; MODULE:       MAIN.C
    ;
    ; DESCRIPTION:  Module principal de contr�le du code DSP.
    ;
    ;
    ;---------------- Syst�mes de S�curit� Publique Positron --------------------
    */
    /*-------- new files----------------------*/
    #include <string.h>
    #include <stdio.h>
    #include "types.h"
    #include <string.h>
    #include <stdio.h>
    #include "types.h"
    #include "evmomapl138_sysconfig.h"
    #include "gpio.h"
    #include "psc.h"
    /* HW Macros */
    #include "hw_types.h"
    /* System Defines */
    #include "lcdkOMAPL138.h"
    #include "soc_OMAPL138.h"
    #include "hw_syscfg0_OMAPL138.h"
    #include "matrice.h"
    #include "cslr.h"
    #include "cslr_cache.h"
    #include "ipc_interrupt.h"
    #include "timer.h"
    #include "interrupt.h"
    #include "evmomapl138_spi.h"
    #include "mcbsp.h"
    #include "edma3.h"
    #include "codec.h"
    #include "evmomapl138_spi.h"
    #include "dspcache.h"
    #include "evmomapl138.h"
    #include "evmomapl138_mcbsp.h"
    #include "evmomapl138_timer.h"
    uint16_t t1,t2;
    void main()
    {
    
        uint16_t i;
        USTIMER_init();
        while(1)
        {
    
    
                    USTIMER_reset();
                    Matrice();
                    t1= USTIMER_get();
                    if (t1 > t2)
                    {
                        t2 = t1;
                        printf("max Time= %d us\r\n\r\n",t2);
    
                    }
    
        }
    
    }
    
    3858.matrice_asm.txt
    ;******************************************************************************
    ;* G3 TMS320C6x C/C++ Codegen                                       PC v8.1.0 *
    ;* Date/Time created: Fri Nov 04 14:57:54 2016                                *
    ;******************************************************************************
    	.compiler_opts --abi=eabi --array_alignment=8 --endian=little --hll_source=on --long_precision_bits=32 --mem_model:code=near --mem_model:const=data --mem_model:data=far_aggregates --object_format=elf --silicon_version=6740 --symdebug:dwarf --symdebug:dwarf_version=3 
    
    ;******************************************************************************
    ;* GLOBAL FILE PARAMETERS                                                     *
    ;*                                                                            *
    ;*   Architecture      : TMS320C674x                                          *
    ;*   Optimization      : Enabled at level 3                                   *
    ;*   Optimizing for    : Speed 1st, size 2nd                                  *
    ;*                       Based on options: -o3, -ms0                          *
    ;*   Endian            : Little                                               *
    ;*   Interrupt Thrshld : Disabled                                             *
    ;*   Data Access Model : Far Aggregate Data                                   *
    ;*   Pipelining        : Enabled                                              *
    ;*   Speculate Loads   : Enabled with threshold = 0                           *
    ;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
    ;*   Debug Info        : DWARF Debug                                          *
    ;*                                                                            *
    ;******************************************************************************
    
    	.asg	A15, FP
    	.asg	B14, DP
    	.asg	B15, SP
    	.global	$bss
    
    
    $C$DW$CU	.dwtag  DW_TAG_compile_unit
    	.dwattr $C$DW$CU, DW_AT_name("../src/matrice.c")
    	.dwattr $C$DW$CU, DW_AT_producer("TI G3 TMS320C6x C/C++ Codegen PC v8.1.0 Copyright (c) 1996-2015 Texas Instruments Incorporated")
    	.dwattr $C$DW$CU, DW_AT_TI_version(0x01)
    	.dwattr $C$DW$CU, DW_AT_comp_dir("C:\eHDT_wk2_test\eHDT_DSP\Release")
    	.global	matrice_data_input
    	.farcommon	matrice_data_input,88,8
    $C$DW$1	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$1, DW_AT_name("matrice_data_input")
    	.dwattr $C$DW$1, DW_AT_TI_symbol_name("matrice_data_input")
    	.dwattr $C$DW$1, DW_AT_location[DW_OP_addr matrice_data_input]
    	.dwattr $C$DW$1, DW_AT_type(*$C$DW$T$51)
    	.dwattr $C$DW$1, DW_AT_external
    	.dwattr $C$DW$1, DW_AT_decl_file("../src/matrice.c")
    	.dwattr $C$DW$1, DW_AT_decl_line(0x07)
    	.dwattr $C$DW$1, DW_AT_decl_column(0x09)
    
    	.global	matrice_data_output
    	.farcommon	matrice_data_output,56,8
    $C$DW$2	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$2, DW_AT_name("matrice_data_output")
    	.dwattr $C$DW$2, DW_AT_TI_symbol_name("matrice_data_output")
    	.dwattr $C$DW$2, DW_AT_location[DW_OP_addr matrice_data_output]
    	.dwattr $C$DW$2, DW_AT_type(*$C$DW$T$52)
    	.dwattr $C$DW$2, DW_AT_external
    	.dwattr $C$DW$2, DW_AT_decl_file("../src/matrice.c")
    	.dwattr $C$DW$2, DW_AT_decl_line(0x08)
    	.dwattr $C$DW$2, DW_AT_decl_column(0x09)
    
    	.global	MatriceInterne
    	.farcommon	MatriceInterne,616,8
    $C$DW$3	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$3, DW_AT_name("MatriceInterne")
    	.dwattr $C$DW$3, DW_AT_TI_symbol_name("MatriceInterne")
    	.dwattr $C$DW$3, DW_AT_location[DW_OP_addr MatriceInterne]
    	.dwattr $C$DW$3, DW_AT_type(*$C$DW$T$42)
    	.dwattr $C$DW$3, DW_AT_external
    	.dwattr $C$DW$3, DW_AT_decl_file("../src/matrice.c")
    	.dwattr $C$DW$3, DW_AT_decl_line(0x0e)
    	.dwattr $C$DW$3, DW_AT_decl_column(0x0b)
    
    ;	C:\ti_CCS6\ccsv6\tools\compiler\ti-cgt-c6000_8.1.0\bin\opt6x.exe C:\\Users\\wangr\\AppData\\Local\\Temp\\184002 C:\\Users\\wangr\\AppData\\Local\\Temp\\184004 
    	.sect	".text"
    	.clink
    	.global	Matrice
    
    $C$DW$4	.dwtag  DW_TAG_subprogram
    	.dwattr $C$DW$4, DW_AT_name("Matrice")
    	.dwattr $C$DW$4, DW_AT_low_pc(Matrice)
    	.dwattr $C$DW$4, DW_AT_high_pc(0x00)
    	.dwattr $C$DW$4, DW_AT_TI_symbol_name("Matrice")
    	.dwattr $C$DW$4, DW_AT_external
    	.dwattr $C$DW$4, DW_AT_TI_begin_file("../src/matrice.c")
    	.dwattr $C$DW$4, DW_AT_TI_begin_line(0x38)
    	.dwattr $C$DW$4, DW_AT_TI_begin_column(0x06)
    	.dwattr $C$DW$4, DW_AT_decl_file("../src/matrice.c")
    	.dwattr $C$DW$4, DW_AT_decl_line(0x38)
    	.dwattr $C$DW$4, DW_AT_decl_column(0x06)
    	.dwattr $C$DW$4, DW_AT_TI_max_frame_size(0x00)
    	.dwpsn	file "../src/matrice.c",line 57,column 1,is_stmt,address Matrice,isa 0
    
    	.dwfde $C$DW$CIE, Matrice
    
    ;******************************************************************************
    ;* FUNCTION NAME: Matrice                                                     *
    ;*                                                                            *
    ;*   Regs Modified     : A0,A1,A2,A3,A4,A5,A6,B0,B1,B2,B3,B4,B5,B31           *
    ;*   Regs Used         : A0,A1,A2,A3,A4,A5,A6,B0,B1,B2,B3,B4,B5,B31           *
    ;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
    ;******************************************************************************
    Matrice:
    ;** --------------------------------------------------------------------------*
    $C$DW$5	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$5, DW_AT_name("k")
    	.dwattr $C$DW$5, DW_AT_TI_symbol_name("k")
    	.dwattr $C$DW$5, DW_AT_type(*$C$DW$T$10)
    	.dwattr $C$DW$5, DW_AT_location[DW_OP_reg4]
    
    $C$DW$6	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$6, DW_AT_name("accumulator")
    	.dwattr $C$DW$6, DW_AT_TI_symbol_name("accumulator")
    	.dwattr $C$DW$6, DW_AT_type(*$C$DW$T$50)
    	.dwattr $C$DW$6, DW_AT_location[DW_OP_reg1]
    
    $C$DW$7	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$7, DW_AT_name("$O$L2")
    	.dwattr $C$DW$7, DW_AT_TI_symbol_name("$O$L2")
    	.dwattr $C$DW$7, DW_AT_type(*$C$DW$T$10)
    	.dwattr $C$DW$7, DW_AT_location[DW_OP_regx 0x44]
    
    $C$DW$8	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$8, DW_AT_name("$O$L1")
    	.dwattr $C$DW$8, DW_AT_TI_symbol_name("$O$L1")
    	.dwattr $C$DW$8, DW_AT_type(*$C$DW$T$10)
    	.dwattr $C$DW$8, DW_AT_location[DW_OP_reg18]
    
    $C$DW$9	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$9, DW_AT_name("$O$U5")
    	.dwattr $C$DW$9, DW_AT_TI_symbol_name("$O$U5")
    	.dwattr $C$DW$9, DW_AT_type(*$C$DW$T$10)
    	.dwattr $C$DW$9, DW_AT_location[DW_OP_reg2]
    
    $C$DW$10	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$10, DW_AT_name("$O$U30")
    	.dwattr $C$DW$10, DW_AT_TI_symbol_name("$O$U30")
    	.dwattr $C$DW$10, DW_AT_type(*$C$DW$T$48)
    	.dwattr $C$DW$10, DW_AT_location[DW_OP_reg6]
    
    $C$DW$11	.dwtag  DW_TAG_variable
    	.dwattr $C$DW$11, DW_AT_name("$O$U11")
    	.dwattr $C$DW$11, DW_AT_TI_symbol_name("$O$U11")
    	.dwattr $C$DW$11, DW_AT_type(*$C$DW$T$36)
    	.dwattr $C$DW$11, DW_AT_location[DW_OP_reg20]
    
    	.dwcfi	cfa_offset, 0
    ;          EXCLUSIVE CPU CYCLES: 2
    ;** 62	-----------------------    L$1 = 14;
    ;**  	-----------------------    U$30 = &matrice_data_output[0];
    ;**  	-----------------------    U$5 = 0;
    ;**  	-----------------------    #pragma MUST_ITERATE(14, 14, 14)
    ;**  	-----------------------    #pragma LOOP_FLAGS(4096u)
               MVKL    .S1     matrice_data_output,A6 ; [A_S674] 
    
               MVKH    .S1     matrice_data_output,A6 ; [A_S674] 
    ||         MVK     .L2     14,B2             ; [B_L674] |62| 
    ||         ZERO    .L1     A2                ; [A_L674] 
    ||         MV      .D1X    B3,A3             ; [A_D64P] |57| 
    ||         MVK     .S2     0x16,B31          ; [B_Sb674] |67| 
    
    	.dwcfi	save_reg_to_reg, 19, 3
    ;** --------------------------------------------------------------------------*
    ;**   BEGIN LOOP $C$L1
    ;** --------------------------------------------------------------------------*
    $C$L1:    
    ;          EXCLUSIVE CPU CYCLES: 3
    ;**	-----------------------g2:
    ;**  	-----------------------    U$11 = &MatriceInterne+U$5;
    ;** 67	-----------------------    L$2 = 22;
    ;** 65	-----------------------    accumulator = 0;
    ;**  	-----------------------    k = 0;
    ;**  	-----------------------    #pragma MUST_ITERATE(22, 22, 22)
    ;**  	-----------------------    #pragma LOOP_FLAGS(4096u)
    ;**	-----------------------g3:
    ;** 70	-----------------------    if ( *U$11++ != 1 ) goto g5;
    ;** 72	-----------------------    accumulator += matrice_data_input[k];
    ;**	-----------------------g5:
    ;** 67	-----------------------    ++k;
    ;** 67	-----------------------    if ( !__builtin_expect((long)!(L$2 = L$2-1), 0L) ) goto g3;
    
               MVKL    .S2     MatriceInterne,B0 ; [B_Sb674] 
    ||         SUB     .L2     B31,4,B4          ; [B_L674] 
    
               MVC     .S2     B4,ILC            ; [B_Sb674] 
               MVKH    .S2     MatriceInterne,B0 ; [B_Sb674] 
    ;*----------------------------------------------------------------------------*
    ;*   SOFTWARE PIPELINE INFORMATION
    ;*
    ;*      Loop found in file               : ../src/matrice.c
    ;*      Loop source line                 : 67
    ;*      Loop opening brace source line   : 69
    ;*      Loop closing brace source line   : 74
    ;*      Known Minimum Trip Count         : 22                    
    ;*      Known Maximum Trip Count         : 22                    
    ;*      Known Max Trip Count Factor      : 22
    ;*      Loop Carried Dependency Bound(^) : 1
    ;*      Unpartitioned Resource Bound     : 1
    ;*      Partitioned Resource Bound(*)    : 1
    ;*      Resource Partition:
    ;*                                A-side   B-side
    ;*      .L units                     0        1*    
    ;*      .S units                     0        0     
    ;*      .D units                     1*       1*    
    ;*      .M units                     0        0     
    ;*      .X cross paths               0        0     
    ;*      .T address paths             1        1     
    ;*      Logical  ops (.LS)           0        0     (.L or .S unit)
    ;*      Addition ops (.LSD)          2        0     (.L or .S or .D unit)
    ;*      Bound(.L .S .LS)             0        1*    
    ;*      Bound(.L .S .D .LS .LSD)     1*       1*    
    ;*
    ;*      Searching for software pipeline schedule at ...
    ;*         ii = 1  Schedule found with 12 iterations in parallel
    ;*
    ;*      Register Usage Table:
    ;*          +-----------------------------------------------------------------+
    ;*          |AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB|
    ;*          |00000000001111111111222222222233|00000000001111111111222222222233|
    ;*          |01234567890123456789012345678901|01234567890123456789012345678901|
    ;*          |--------------------------------+--------------------------------|
    ;*       0: |**  **                          |** ***                          |
    ;*          +-----------------------------------------------------------------+
    ;*
    ;*      Done
    ;*
    ;*      Loop will be splooped
    ;*      Collapsed epilog stages       : 0
    ;*      Collapsed prolog stages       : 0
    ;*      Minimum required memory pad   : 0 bytes
    ;*
    ;*      Minimum safe trip count       : 1
    ;*      Min. prof. trip count  (est.) : 2
    ;*
    ;*      Mem bank conflicts/iter(est.) : { min 0.000, est 0.125, max 1.000 }
    ;*      Mem bank perf. penalty (est.) : 11.1%
    ;*
    ;*      Effective ii                : { min 1.00, est 1.13, max 2.00 }
    ;*
    ;*
    ;*      Total cycles (est.)         : 11 + min_trip_cnt * 1 = 33        
    ;*----------------------------------------------------------------------------*
    ;*        SINGLE SCHEDULED ITERATION
    ;*
    ;*        $C$C43:
    ;*   0              LDHU    .D2T2   *B4++(2),B3       ; [B_D64P] |70| 
    ;*   1              NOP     4       ; [A_L674] 
    ;*   5              CMPEQ   .L2     B3,1,B1           ; [B_L674] |70| 
    ;*   6              MV      .S2     B1,B5             ; [B_Sb674] |70| Split a long life
    ;*     ||   [ B1]   LDW     .D1T1   *+A5[A4],A0       ; [A_D64P] |72|  ^ 
    ;*     ||           ADD     .S1     1,A4,A4           ; [A_S674] |67|  ^ 
    ;*   7              MVD     .M2     B5,B0             ; [B_M674] |70| Split a long life
    ;*   8              NOP     3       ; [A_L674] 
    ;*  11      [ B0]   ADD     .L1     A0,A1,A1          ; [A_L674] |72| 
    ;*     ||           SPBR                              $C$C43 ; [] 
    ;*  12              ; BRANCHCC OCCURS {$C$C43}        ; [] |67| 
    ;*
    ;*      (Performance) If you know that this loop will always execute at a
    ;*          multiple of <44> and at least <44> times, try adding "#pragma
    ;*          MUST_ITERATE(44, ,44)" just before the loop.
    ;*----------------------------------------------------------------------------*
    $C$L2:    ; PIPED LOOP PROLOG
    ;          EXCLUSIVE CPU CYCLES: 12
    
               SPLOOPD         1                 ;12 ; [A_L674] (P) 
    ||         ADD     .L2X    B0,A2,B4          ; [B_L674] 
    
    ;** --------------------------------------------------------------------------*
    $C$L3:    ; PIPED LOOP KERNEL
    ;          EXCLUSIVE CPU CYCLES: 1
    	.dwpsn	file "../src/matrice.c",line 70,column 13,is_stmt,isa 0
               LDHU    .D2T2   *B4++(2),B3       ; [B_D64P] |70| (P) <0,0> 
               NOP             3                 ; [A_L674] 
    	.dwpsn	file "../src/matrice.c",line 72,column 14,is_stmt,isa 0
    
               SPMASK                            ; [] 
    ||^        MVKL    .S1     matrice_data_input,A5 ; [A_S674] |72| 
    
    	.dwpsn	file "../src/matrice.c",line 65,column 9,is_stmt,isa 0
    
               SPMASK                            ; [] 
    ||^        ZERO    .L1     A4                ; [A_L674] |65| 
    ||^        MVKH    .S1     matrice_data_input,A5 ; [A_S674] |72| 
    ||         CMPEQ   .L2     B3,1,B1           ; [B_L674] |70| (P) <0,5> 
    
    	.dwpsn	file "../src/matrice.c",line 67,column 15,is_stmt,isa 0
    
               MV      .S2     B1,B5             ; [B_Sb674] |70| (P) <0,6> Split a long life
    ||         ADD     .S1     1,A4,A4           ; [A_S674] |67| (P) <0,6>  ^ 
    || [ B1]   LDW     .D1T1   *+A5[A4],A0       ; [A_D64P] |72| (P) <0,6>  ^ 
    
    	.dwpsn	file "../src/matrice.c",line 70,column 13,is_stmt,isa 0
               MVD     .M2     B5,B0             ; [B_M674] |70| (P) <0,7> Split a long life
               NOP             2                 ; [A_L674] 
    	.dwpsn	file "../src/matrice.c",line 65,column 9,is_stmt,isa 0
    
               SPMASK                            ; [] 
    ||^        ZERO    .L1     A1                ; [A_L674] |65| 
    
    	.dwpsn	file "../src/matrice.c",line 72,column 14,is_stmt,isa 0
    
               SPKERNEL        0,0               ; [] 
    || [ B0]   ADD     .L1     A0,A1,A1          ; [A_L674] |72| <0,11> 
    
    ;** --------------------------------------------------------------------------*
    $C$L4:    ; PIPED LOOP EPILOG
    ;          EXCLUSIVE CPU CYCLES: 12
    ;** 75	-----------------------    *U$30++ = accumulator;
    ;** 62	-----------------------    U$5 += 44;
    ;** 62	-----------------------    if ( L$1 = L$1-1 ) goto g2;
    ;**  	-----------------------    return;
    	.dwpsn	file "../src/matrice.c",line 62,column 11,is_stmt,isa 0
               SUB     .D2     B2,1,B2           ; [B_D64P] |62| 
               NOP             5                 ; [A_L674] 
    
       [ B2]   BNOP            $C$L1,3           ; [] |62| 
    ||         ADDAW   .D1     A2,11,A2          ; [A_D64P] |62| 
    
               MVK     .S1     44,A0             ; [A_S674] |62| 
    	.dwpsn	file "../src/matrice.c",line 75,column 9,is_stmt,isa 0
               STW     .D1T1   A1,*A6++(4)       ; [A_D64P] |75| 
    	.dwpsn	file "../src/matrice.c",line 62,column 11,is_stmt,isa 0
               ; BRANCHCC OCCURS {$C$L1}         ; [] |62| 
    ;** --------------------------------------------------------------------------*
    ;          EXCLUSIVE CPU CYCLES: 6
    	.dwpsn	file "../src/matrice.c",line 77,column 1,is_stmt,isa 0
    $C$DW$12	.dwtag  DW_TAG_TI_branch
    	.dwattr $C$DW$12, DW_AT_low_pc(0x00)
    	.dwattr $C$DW$12, DW_AT_TI_return
    
               RETNOP          A3,5              ; [] |77| 
               ; BRANCH OCCURS {A3}              ; [] |77| 
    	.dwattr $C$DW$4, DW_AT_TI_end_file("../src/matrice.c")
    	.dwattr $C$DW$4, DW_AT_TI_end_line(0x4d)
    	.dwattr $C$DW$4, DW_AT_TI_end_column(0x01)
    	.dwendentry
    	.dwendtag $C$DW$4
    
    
    ;******************************************************************************
    ;* BUILD ATTRIBUTES                                                           *
    ;******************************************************************************
    	.battr "TI", Tag_File, 1, Tag_Long_Precision_Bits(2)
    	.battr "TI", Tag_File, 1, Tag_Bitfield_layout(2)
    	.battr "TI", Tag_File, 1, Tag_ABI_enum_size(3)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_wchar_t(1)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_array_object_alignment(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_array_object_align_expected(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_PIC(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_PID(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_DSBT(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_stack_align_needed(0)
    	.battr "c6xabi", Tag_File, 1, Tag_ABI_stack_align_preserved(0)
    	.battr "TI", Tag_File, 1, Tag_Tramps_Use_SOC(1)
    
    ;******************************************************************************
    ;* TYPE INFORMATION                                                           *
    ;******************************************************************************
    
    $C$DW$T$20	.dwtag  DW_TAG_structure_type
    	.dwattr $C$DW$T$20, DW_AT_byte_size(0x18)
    $C$DW$13	.dwtag  DW_TAG_member
    	.dwattr $C$DW$13, DW_AT_type(*$C$DW$T$10)
    	.dwattr $C$DW$13, DW_AT_name("fd")
    	.dwattr $C$DW$13, DW_AT_TI_symbol_name("fd")
    	.dwattr $C$DW$13, DW_AT_data_member_location[DW_OP_plus_uconst 0x0]
    	.dwattr $C$DW$13, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$13, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$13, DW_AT_decl_line(0x49)
    	.dwattr $C$DW$13, DW_AT_decl_column(0x0b)
    
    $C$DW$14	.dwtag  DW_TAG_member
    	.dwattr $C$DW$14, DW_AT_type(*$C$DW$T$19)
    	.dwattr $C$DW$14, DW_AT_name("buf")
    	.dwattr $C$DW$14, DW_AT_TI_symbol_name("buf")
    	.dwattr $C$DW$14, DW_AT_data_member_location[DW_OP_plus_uconst 0x4]
    	.dwattr $C$DW$14, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$14, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$14, DW_AT_decl_line(0x4a)
    	.dwattr $C$DW$14, DW_AT_decl_column(0x16)
    
    $C$DW$15	.dwtag  DW_TAG_member
    	.dwattr $C$DW$15, DW_AT_type(*$C$DW$T$19)
    	.dwattr $C$DW$15, DW_AT_name("pos")
    	.dwattr $C$DW$15, DW_AT_TI_symbol_name("pos")
    	.dwattr $C$DW$15, DW_AT_data_member_location[DW_OP_plus_uconst 0x8]
    	.dwattr $C$DW$15, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$15, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$15, DW_AT_decl_line(0x4b)
    	.dwattr $C$DW$15, DW_AT_decl_column(0x16)
    
    $C$DW$16	.dwtag  DW_TAG_member
    	.dwattr $C$DW$16, DW_AT_type(*$C$DW$T$19)
    	.dwattr $C$DW$16, DW_AT_name("bufend")
    	.dwattr $C$DW$16, DW_AT_TI_symbol_name("bufend")
    	.dwattr $C$DW$16, DW_AT_data_member_location[DW_OP_plus_uconst 0xc]
    	.dwattr $C$DW$16, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$16, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$16, DW_AT_decl_line(0x4c)
    	.dwattr $C$DW$16, DW_AT_decl_column(0x16)
    
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    	.dwattr $C$DW$17, DW_AT_data_member_location[DW_OP_plus_uconst 0x10]
    	.dwattr $C$DW$17, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$17, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$17, DW_AT_decl_line(0x4d)
    	.dwattr $C$DW$17, DW_AT_decl_column(0x16)
    
    $C$DW$18	.dwtag  DW_TAG_member
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    	.dwattr $C$DW$18, DW_AT_name("flags")
    	.dwattr $C$DW$18, DW_AT_TI_symbol_name("flags")
    	.dwattr $C$DW$18, DW_AT_data_member_location[DW_OP_plus_uconst 0x14]
    	.dwattr $C$DW$18, DW_AT_accessibility(DW_ACCESS_public)
    	.dwattr $C$DW$18, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$18, DW_AT_decl_line(0x4e)
    	.dwattr $C$DW$18, DW_AT_decl_column(0x16)
    
    	.dwattr $C$DW$T$20, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$T$20, DW_AT_decl_line(0x48)
    	.dwattr $C$DW$T$20, DW_AT_decl_column(0x10)
    	.dwendtag $C$DW$T$20
    
    $C$DW$T$21	.dwtag  DW_TAG_typedef
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    	.dwattr $C$DW$T$21, DW_AT_type(*$C$DW$T$20)
    	.dwattr $C$DW$T$21, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$21, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdio.h")
    	.dwattr $C$DW$T$21, DW_AT_decl_line(0x4f)
    	.dwattr $C$DW$T$21, DW_AT_decl_column(0x03)
    
    $C$DW$T$2	.dwtag  DW_TAG_unspecified_type
    	.dwattr $C$DW$T$2, DW_AT_name("void")
    
    $C$DW$T$3	.dwtag  DW_TAG_pointer_type
    	.dwattr $C$DW$T$3, DW_AT_type(*$C$DW$T$2)
    	.dwattr $C$DW$T$3, DW_AT_address_class(0x20)
    
    $C$DW$T$22	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$22, DW_AT_name("Ptr")
    	.dwattr $C$DW$T$22, DW_AT_type(*$C$DW$T$3)
    	.dwattr $C$DW$T$22, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$22, DW_AT_decl_file("../include/types.h")
    	.dwattr $C$DW$T$22, DW_AT_decl_line(0x23)
    	.dwattr $C$DW$T$22, DW_AT_decl_column(0x11)
    
    $C$DW$T$4	.dwtag  DW_TAG_base_type
    	.dwattr $C$DW$T$4, DW_AT_encoding(DW_ATE_boolean)
    	.dwattr $C$DW$T$4, DW_AT_name("bool")
    	.dwattr $C$DW$T$4, DW_AT_byte_size(0x01)
    
    $C$DW$T$5	.dwtag  DW_TAG_base_type
    	.dwattr $C$DW$T$5, DW_AT_encoding(DW_ATE_signed_char)
    	.dwattr $C$DW$T$5, DW_AT_name("signed char")
    	.dwattr $C$DW$T$5, DW_AT_byte_size(0x01)
    
    $C$DW$T$24	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$24, DW_AT_name("int8_t")
    	.dwattr $C$DW$T$24, DW_AT_type(*$C$DW$T$5)
    	.dwattr $C$DW$T$24, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$24, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdint.h")
    	.dwattr $C$DW$T$24, DW_AT_decl_line(0x2a)
    	.dwattr $C$DW$T$24, DW_AT_decl_column(0x1d)
    
    $C$DW$T$25	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$25, DW_AT_name("int_least8_t")
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    	.dwattr $C$DW$T$25, DW_AT_language(DW_LANG_C)
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    	.dwattr $C$DW$T$25, DW_AT_decl_column(0x17)
    
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    	.dwattr $C$DW$T$6, DW_AT_encoding(DW_ATE_unsigned_char)
    	.dwattr $C$DW$T$6, DW_AT_name("unsigned char")
    	.dwattr $C$DW$T$6, DW_AT_byte_size(0x01)
    
    $C$DW$T$26	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$26, DW_AT_name("UInt8")
    	.dwattr $C$DW$T$26, DW_AT_type(*$C$DW$T$6)
    	.dwattr $C$DW$T$26, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$26, DW_AT_decl_file("../include/types.h")
    	.dwattr $C$DW$T$26, DW_AT_decl_line(0x35)
    	.dwattr $C$DW$T$26, DW_AT_decl_column(0x1c)
    
    $C$DW$T$27	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$27, DW_AT_name("Uint8")
    	.dwattr $C$DW$T$27, DW_AT_type(*$C$DW$T$6)
    	.dwattr $C$DW$T$27, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$27, DW_AT_decl_file("../include/types.h")
    	.dwattr $C$DW$T$27, DW_AT_decl_line(0x2b)
    	.dwattr $C$DW$T$27, DW_AT_decl_column(0x1b)
    
    $C$DW$T$19	.dwtag  DW_TAG_pointer_type
    	.dwattr $C$DW$T$19, DW_AT_type(*$C$DW$T$6)
    	.dwattr $C$DW$T$19, DW_AT_address_class(0x20)
    
    $C$DW$T$28	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$28, DW_AT_name("uint8_t")
    	.dwattr $C$DW$T$28, DW_AT_type(*$C$DW$T$6)
    	.dwattr $C$DW$T$28, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$28, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdint.h")
    	.dwattr $C$DW$T$28, DW_AT_decl_line(0x2b)
    	.dwattr $C$DW$T$28, DW_AT_decl_column(0x1c)
    
    $C$DW$T$29	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$29, DW_AT_name("uint_least8_t")
    	.dwattr $C$DW$T$29, DW_AT_type(*$C$DW$T$28)
    	.dwattr $C$DW$T$29, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$29, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdint.h")
    	.dwattr $C$DW$T$29, DW_AT_decl_line(0x3a)
    	.dwattr $C$DW$T$29, DW_AT_decl_column(0x16)
    
    $C$DW$T$7	.dwtag  DW_TAG_base_type
    	.dwattr $C$DW$T$7, DW_AT_encoding(DW_ATE_signed_char)
    	.dwattr $C$DW$T$7, DW_AT_name("wchar_t")
    	.dwattr $C$DW$T$7, DW_AT_byte_size(0x02)
    
    $C$DW$T$8	.dwtag  DW_TAG_base_type
    	.dwattr $C$DW$T$8, DW_AT_encoding(DW_ATE_signed)
    	.dwattr $C$DW$T$8, DW_AT_name("short")
    	.dwattr $C$DW$T$8, DW_AT_byte_size(0x02)
    
    $C$DW$T$30	.dwtag  DW_TAG_typedef
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    	.dwattr $C$DW$T$30, DW_AT_decl_column(0x14)
    
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    	.dwattr $C$DW$T$32, DW_AT_decl_file("C:/ti_CCS6/ccsv6/tools/compiler/ti-cgt-c6000_8.1.0/include/stdint.h")
    	.dwattr $C$DW$T$32, DW_AT_decl_line(0x3c)
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    	.dwattr $C$DW$T$9, DW_AT_byte_size(0x02)
    
    $C$DW$T$33	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$33, DW_AT_name("Bool")
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    	.dwattr $C$DW$T$33, DW_AT_decl_file("../include/types.h")
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    $C$DW$T$34	.dwtag  DW_TAG_typedef
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    	.dwattr $C$DW$T$34, DW_AT_decl_file("../include/types.h")
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    $C$DW$T$35	.dwtag  DW_TAG_typedef
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    	.dwattr $C$DW$T$35, DW_AT_decl_file("../include/types.h")
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    	.dwattr $C$DW$T$35, DW_AT_decl_column(0x1c)
    
    $C$DW$T$36	.dwtag  DW_TAG_pointer_type
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    $C$DW$T$40	.dwtag  DW_TAG_typedef
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    	.dwattr $C$DW$T$40, DW_AT_language(DW_LANG_C)
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    	.dwattr $C$DW$T$40, DW_AT_decl_column(0x1c)
    
    
    $C$DW$T$41	.dwtag  DW_TAG_array_type
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    	.dwattr $C$DW$T$41, DW_AT_language(DW_LANG_C)
    	.dwattr $C$DW$T$41, DW_AT_byte_size(0x2c)
    $C$DW$19	.dwtag  DW_TAG_subrange_type
    	.dwattr $C$DW$19, DW_AT_upper_bound(0x15)
    
    	.dwendtag $C$DW$T$41
    
    
    $C$DW$T$42	.dwtag  DW_TAG_array_type
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    $C$DW$20	.dwtag  DW_TAG_subrange_type
    	.dwattr $C$DW$20, DW_AT_upper_bound(0x0d)
    
    $C$DW$21	.dwtag  DW_TAG_subrange_type
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    	.dwendtag $C$DW$T$42
    
    $C$DW$T$43	.dwtag  DW_TAG_typedef
    	.dwattr $C$DW$T$43, DW_AT_name("uint_least16_t")
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    7673.matrice.txt
    include <string.h>
    #include <stdio.h>
    #include "types.h"
    
    
    int32_t matrice_data_input[22];
    int32_t matrice_data_output[14];
    uint16_t MatriceInterne[14][22];
    
    void Matrice(void)
    {
        uint16_t i,k;
        int32_t accumulator;
        #pragma MUST_ITERATE(1,14 , 1)
    
      for(i=0;i<14;i++)
        {
            accumulator=0;
          #pragma MUST_ITERATE(1,21 , 1)
          for(k=0;k<22;k++)
            {
                if(MatriceInterne[i][k]==1)
                {
                    accumulator += matrice_data_input[k];
                }
            }
            matrice_data_output[i]= accumulator;
        }
    }
    

  • I apologize for the delay.

    Thank you for submitting the files.  When I build your matrice.c with the options you show for your Release configuration, I get assembly output that is the same as I see in your matrice.asm.  (To be precise, it does not match.  But I can tell it will take the same number of cycles.)  I presume this is the assembly code which runs very fast, about 2 micro seconds.  

    So I still have not reproduced the poor performing code you first complain about.  Please show, by copy-n-paste, the exact build options the compiler sees when you the code runs slower, about 40 micro seconds.

    Thanks and regards,

    -George

  • Hi George,

    thanks for your reply. the screen shot I sent you is the exact configuration, and the second image shows the executime is 61us.

    sorry, I forgot to mention that my code is running on DDR2. attached is my link cmd file.

    Regards,

    ron

    4863.linker_dsp.txt
    /* linker_dsp.cmd */
    
    -stack 0x10000
    -heap 0x500  //0x10000
    
    // ============================================================================
    //                         Specify the System Memory Map
    // ============================================================================
    #define IPC_ARM_START                   0x80000000
    #define IPC_ARM_SIZE                    0x10
    #define IPC_DSP_START                   IPC_ARM_START + IPC_ARM_SIZE
    #define IPC_DSP_SIZE                    0x10
    #define SHARED_IRAM_START               IPC_ARM_START + IPC_ARM_SIZE + IPC_DSP_SIZE
    #define SHARED_IRAM_SIZE                0x1FFFF - (IPC_ARM_SIZE + IPC_DSP_SIZE)
    
    
    MEMORY
    {
    
        L1P:    o = 0x11E00000              l = 0x00008000
        L1D:    o = 0x11F00000              l = 0x00008000
        L2:     o = 0x11800000              l = 0x0003F980
        DARAM_MATRICE:   o = 0x1183F980     l = 0x00000280
        DARAM_TTY_DATA:  o = 0x1183FC00     l = 0x00000300
        DARAM_TTY_COEFF: o = 0x1183FF00     l = 0x00000100
    //    shared_ROM_DSP:  o = 0x80000000   l = 0x00003FFF
        entry_point:     o = 0x80004000     l = 0x00000100
        shared_ram_DSP:  o = 0x80004100     l = 0x00010F00
        DDR2:            o = 0xC0000000     l = 0x01000000
        IPC_ARM:         o = IPC_ARM_START  l = IPC_ARM_SIZE        /* 16 bytes for ARM */
        IPC_DSP:             o = IPC_DSP_START  l = IPC_DSP_SIZE        /* 16 bytes for DSP */
    }
    
    // ============================================================================
    //                 Specify the Sections Allocation into Memory
    // ============================================================================
    SECTIONS
    {
        .cinit        >        DDR2               // Initialization Tables
        .pinit        >        DDR2               // Constructor Tables
        .init_array   >        DDR2               //
        .binit        >        DDR2               // Boot Tables
        .const        >        DDR2               // Constant Data
        .switch       >        DDR2               // Jump Tables
        .text         >        DDR2               // Executable Code
        ipc_arm       >        IPC_ARM
        ipc_dsp       >        IPC_DSP
       // .text:_c_int00: align=1024 > DDR2         // Entrypoint
       .text:_c_int00 > entry_point
    
        GROUP (NEARDP_DATA)                       // group near data
        {
           .neardata
           .rodata
           .bss                                   // note: removed fill = 0
        }> L2
        .far: fill = 0x0, load > DDR2             // Far Global & Static Variables
        .fardata      >        DDR2               // Far RW Data
        .stack        >        L2               // Software System Stack
        .sysmem       >        L2               // Dynamic Memory Allocation Area
    
        .cio          >        DDR2               // C I/O Buffer
        .vecs         >        DDR2               // Interrupt Vectors
        BdtFIR > DARAM_TTY_COEFF
    
        DPR
        {
            MemoirePartageeUSB.obj
        } > shared_ram_DSP
    
    }
    
    

  • I'm not certain, but I suspect you have not enabled the cache.  I do not have enough knowledge of cache to be a reliable guide.  I suggest you start a new thread in the C67x device forum.  Or, if you prefer, I can move this thread to that forum.

    Thanks and regards,

    -George