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Compiler: Linker directive section placement problem using GROUP : TABLE

Tool/software: TI C/C++ Compiler

(TMS570LC4, CCS v5.5)

Using in my linker directive file:

   VECTORS (X)           : origin = 0x00000000 length = 0x00000040 vfill=0xFFFFFFFF
   TABLE (R)             : origin = 0x00000040 length = 0x00000020 vfill=0xFFFFFFFF
   FLASHBOOT (RX)        : origin = 0x00000060 length = 0x0007FFA0 vfill=0xFFFFFFFF

...

   GROUP : > TABLE
    {
        codecrc
        codelength
    }

   applEntry    : {} > APPL_ENTRY,            type = NOLOAD

   codecrc    : {} > TABLE,            type = DSECT
   codelength : {} > TABLE,            type = DSECT


The problem is that the linker places both codecrc and codelength on the same address:

(.map file)

codecrc 0 00000040 00000000 DSECT

codelength

* 0 00000040 00000000 DSECT

Is there a way to put an offet like:

codelength : {} > TABLE + something ?

TMS570_link.rar

  • Simon lapointe said:

       codecrc    : {} > TABLE,            type = DSECT
       codelength : {} > TABLE,            type = DSECT


    The problem is that the linker places both codecrc and codelength on the same address:

    The linker is specifically allowed to do this for DSECT output sections.  Please see the wiki article Linker Special Section Types for the full details.  

    Please describe the overarching problem you want to solve.  It is unlikely that DSECT is the right to way to do it.

    Thanks and regards,

    -George

  • Ok, thanks, based on this article, I've found this not so elegant solution:

    codecrc : {} > TABLE, type = DSECT
    codelength : run = 0x00000044, type = DSECT

    It works for the moment but it' a little bit hard coded. Is there a way to add an offset on the previous, what is the synthax ?

    About the overall picture, it is in a context of bootloader and bootloader updater. These locations are within the active section code or within the code to write, depending where you are in the flash scenario. But you're right, I guess it should have cleaner way to do the same thing.
  • Simon lapointe said:
    About the overall picture, it is in a context of bootloader and bootloader updater. These locations are within the active section code or within the code to write, depending where you are in the flash scenario. But you're right, I guess it should have cleaner way to do the same thing.

    I'm sorry, but I don't get it.  So I can't give you any suggestions on a better method.  Though I continue to be certain that DSECT is wrong.

    Simon lapointe said:
    Is there a way to add an offset on the previous, what is the synthax ?

    I hesitate to assist you in making your wrong solution work better.  That said, consider the following.

    You can create #define symbols, and simple expressions, just like in C.  Something like this ...

    #define BASE 0x40
    ...
    TABLE (R) : origin = BASE length = 0x00000020 vfill=0xFFFFFFFF
    ...
    codecrc : {} > TABLE, type = DSECT
    codelength : run = BASE+4, type = DSECT

    Thanks and regards,

    -George

  • I overlooked something from your first post that needs discussion.

    Simon lapointe said:

    GROUP : > TABLE
        {
            codecrc
            codelength
        }

       applEntry    : {} > APPL_ENTRY,            type = NOLOAD

       codecrc    : {} > TABLE,            type = DSECT
       codelength : {} > TABLE,            type = DSECT

    The output sections codecrc and codelength are created two times.  Once in the GROUP, and once with DSECT.  This is allowed, but odd.  I'm not sure what happens in this case.  I expect the second ones would be zero length sections.  Is that the case?

    Thanks and regards,

    -George

  • You're right, I've got a parser which read the .out file and it detects that they are created 2 times, the first one is zero though, the second is good.

    Do you have a suggestion to avoid this problem ?

    I'll come back to you in few days with an explanation of the whole process.

    Thanks a lot.

  • Simon lapointe said:
    Do you have a suggestion to avoid this problem ?

    Give each output section a different name.  

    Thanks and regards,

    -George