Tool/software: TI C/C++ Compiler
Hi,I get the introduction of memory protection from the section 2.9.2 of TRM :sprufk5a-TMS320C674x DSP Megamodule, I set the memory protection register value as follow:
1、Enable L1P、L1D Cache 32K
2、MPPA
L1PMPPA0-31: 0，all access dennied。
L1DMPPA0-31: 0，all access dennied。
when I debug it,I found that write to L1P、L1D memory can trigger an exception PMC_CMPA /DMC_CMPA event ,but read from L1P 、L1D memory，there is no exception。
Is this right?
Ray,
In memory protection registers, Have you configured MPSAR, MPEAR, and MPPA to match your expected configuration.
There is a good discussion on this topic with an example on the e2e post here:
Based on that discussion, I think you need to set the AIDs to 1 for the memory protection to apply. Please review the information shared there and let us know if you have any follow up questions.
Regards.
Rahul
Hi,Rahul,
Thank you for your answer.I have read the discussion,I think there is some diffrences.
1、I set the AIDs to 0,at least there is an exception when write to L1P、L1D memory,but no excption is generated when read from L1P、L1D memory。
2、I have tried to set the AIDx to 1 for your sugggestion,but no excption for read from L1P、L1D memory。
3、My DSP type: DRA624, ARM cortex-A8 + C674x DSP, I can't find out the MPSAR/MPEAR from the MPU module .From the TRM setion 2.9.2 of sprufk5a-TMS320C674x DSP Megamodule, the MPU register is as follow:
Thanks，
Ray
