Tool/software: TI C/C++ Compiler
Hello,
I am working on this project on TI MSP430 which worked alright when i was on an older compiler (v4.0.0.B1) and after changing the compiler (to V6.9.3.LTS) i am seeing this error message:
"../lnk_msp430f2618.cmd", line 95: error #10099-D: program will not fit into
available memory. placement with alignment fails for section ".cinit" size
0x133 . Available memory ranges:
FLASH size: 0xcab0 unused: 0x0 max hole: 0x0
error #10010: errors encountered during linking; "csac_cc4.out" not built
and below warnings:
"../lnk_msp430f2618.cmd", line 110: warning #10424-D: Linker command file has
no sections of type=VECT_INIT, but does contain .intXX sections. This file
may be out of date. Generating interrupt pointers for all .intXX sections.
The default handler provided in the RTS will be used if no other handler is
found. It is recommend that you update your linker command file to the
latest version.
warning #10247-D: creating output section ".data" without a SECTIONS
specification
warning #10247-D: creating output section ".init_array" without a SECTIONS
specification.
For the warnings adding .data to RAM and .init_array to FLASH in linker command file should work as discussed in the forum. Right now i am concerned about the errors
After reading similar problems on TI forums I changed .cinit : {} > FLASH to .cinit : {} > FLASH | FLASH2 and it compiles fine but it breaks during the run time. My project has a BSL which jumps to the address stored in ISR31 to start the application's main(). I want to know if writing .cinit to FLASH2 breaks it or its BSL that isn't finding the correct starting address or its breaking after jumping to the the application code.
I am new with TI uC's.
Any help wold be appreciated.
Regards,
Rishit