• State Resolved
  • Locked Locked
  • Replies 8 replies
  • Subscribers 54 subscribers
  • Views 3038 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CCS/TMS320F28379D: Can the .stack and .esysmem 10210-D warnings that arise be safely ignored? Even though they are defined in the *.cmd file.

Graham Reitz29
Intellectual 960 points
Part Number: TMS320F28379D
Other Parts Discussed in Thread: C2000WARE, CONTROLSUITE

Tool/software: Code Composer Studio

Can the .stack and .esysmem 10210-D warnings that arise be safely ignored?  Even though they are defined in the *.cmd file.

warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size
warning #10210-D: creating ".esysmem" section with default size of 0x400; use the -heap option to change the default size

The correct memory sizes do show up in the Memory Allocation View.

If yes, why are these warnings even present when they are defined correctly?

Kindly,

Graham

  • 0
    TI__Guru**** 232880 points

    I'm not sure how this happened.  Please attach your linker command file to your next post.  So the file does not get rejected, add the extension ".txt" to it.  Also show the entire linker command invocation, and all the diagnostics which follow.  Copy and paste from the Console view, not the Problems view.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Intellectual 960 points

    Thanks George.  The *cmd file has been posted.  Below is the linker command invocation:

    Building target: program.out

    Invoking: C2000 Linker

    "/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --advice:performance=all --define=CPU1 -g --c99 --diag_warning=225 --diag_wrap=off --display_error_number --issue_remarks --verbose_diagnostics -z -m"program.map" --warn_sections -i"/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/lib" -i"/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/include" -i"/Users/grahamreitz/ccs/F828379D_Workspace/C-Motive" -i"/Applications/ti/c2000/C2000Ware_1_00_01_00/device_support/f2837xd/headers/cmd" --reread_libs --diag_wrap=off --display_error_number --issue_remarks --verbose_diagnostics --xml_link_info="progam_linkInfo.xml" --rom_model -o "program.out" "./F2837xD_CodeStartBranch.obj" "./F2837xD_DefaultISR.obj" "./F2837xD_GlobalVariableDefs.obj" "./F2837xD_Gpio.obj" "./F2837xD_Ipc.obj" "./F2837xD_PieCtrl.obj" "./F2837xD_PieVect.obj" "./F2837xD_Spi.obj" "./F2837xD_SysCtrl.obj" "./F2837xD_usDelay.obj" "./main.obj"  -lrts2800_fpu32.lib -lC_Motive_2837xD_RAM_CPU1.cmd -lF2837xD_Headers_nonBIOS_cpu1.cmd 

    <Linking>

    warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size

    warning #10210-D: creating ".esysmem" section with default size of 0x400; use the -heap option to change the default size

    Finished building target: program.out

    **** Build Finished ****

    F2837xD_RAM_CPU1.txt 
    MEMORY
{

PAGE 0 :    // Program memory

    // BEGIN is used for the "boot to SARAM" bootloader mode
    BEGIN       : origin = 0x000000, length = 0x000002

    // RAMMx is MCU dedicated, 2048 bytes each, 4096 total
    RAMM0       : origin = 0x000122, length = 0x0002DE

    // RAMDx is MCU dedicated, 4096 bytes each, 8192 total
    RAMD0       : origin = 0x00B000, length = 0x000800

    // RAMLSx can be shared with CLA via MSEL_LSx bit field, 4096 bytes each, 24,576 total
    RAMLS0      : origin = 0x008000, length = 0x000800
    RAMLS1      : origin = 0x008800, length = 0x000800
    RAMLS2      : origin = 0x009000, length = 0x000800
    RAMLS3      : origin = 0x009800, length = 0x000800
    RAMLS4      : origin = 0x00A000, length = 0x000800

    // Reset
    RESET       : origin = 0x3FFFC0, length = 0x000002

    // On-chip flash sectors
    FLASHA      : origin = 0x080000, length = 0x002000
    FLASHB      : origin = 0x082000, length = 0x002000
    FLASHC      : origin = 0x084000, length = 0x002000
    FLASHD      : origin = 0x086000, length = 0x002000
    FLASHE      : origin = 0x088000, length = 0x002000
    FLASHF      : origin = 0x090000, length = 0x002000
    FLASHG      : origin = 0x098000, length = 0x002000
    FLASHH      : origin = 0x0A0000, length = 0x002000
    FLASHI      : origin = 0x0A8000, length = 0x002000
    FLASHJ      : origin = 0x0B0000, length = 0x002000
    FLASHK      : origin = 0x0B8000, length = 0x002000
    FLASHL      : origin = 0x0BA000, length = 0x002000
    FLASHM      : origin = 0x0BC000, length = 0x002000
    FLASHN      : origin = 0x0BE000, length = 0x002000

// Not used

    // Vector table
//    PIEVECTTABLE    :origin = 0x000D00, length = 0x000200

    // CLA messaging
//    CLA1_MSGRAMLOW  : origin = 0x001480, length = 0x000080
//    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080

    // UP RX/TX messaging
//    UPPTXMSG        : origin = 0x006C00, length = 0x000200
//    UPPRXMSG        : origin = 0x006E00, length = 0x000200

    // Secure ROM
//    SECUREROM   :origin = 0x3F0000, length = 0x008000

    // Boot ROM
//    BOOTROM     :origin = 0x3F8000, length = 0x007FC0

// End - Not used

PAGE 1 :    // Data memory

    // Part of M0, BOOT rom will use this for the stack
    BOOT_RSVD   : origin = 0x000002, length = 0x000120

    // RAMMx is MCU dedicated, 2048 bytes each, 4096 total
    RAMM1       : origin = 0x000400, length = 0x000400

    // RAMDx is MCU dedicated, 4096 bytes each, 8192 total
    RAMD1       : origin = 0x00B800, length = 0x000800

    // RAMLSx can be shared with CLA via MSEL_LSx bit field, 4096 bytes each, 24,576 total
    RAMLS5      : origin = 0x00A800, length = 0x000800

    // RAMGSn Globaly shared between MCUs, 8192 bytes each, 131,072 total
    RAMGS0      : origin = 0x00C000, length = 0x001000
    RAMGS1      : origin = 0x00D000, length = 0x001000
    RAMGS2      : origin = 0x00E000, length = 0x001000
    RAMGS3      : origin = 0x00F000, length = 0x001000
    RAMGS4      : origin = 0x010000, length = 0x001000
    RAMGS5      : origin = 0x011000, length = 0x001000
    RAMGS6      : origin = 0x012000, length = 0x001000
    RAMGS7      : origin = 0x013000, length = 0x001000
    RAMGS8      : origin = 0x014000, length = 0x001000
    RAMGS9      : origin = 0x015000, length = 0x001000
    RAMGS10     : origin = 0x016000, length = 0x001000
    RAMGS11     : origin = 0x017000, length = 0x001000
    RAMGS12     : origin = 0x018000, length = 0x001000
    RAMGS13     : origin = 0x019000, length = 0x001000
    RAMGS14     : origin = 0x01A000, length = 0x001000
    RAMGS15     : origin = 0x01B000, length = 0x001000

    // MCU shared
    CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
    CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400

// Not used

    // CAN messaging
//    CANA_MSG_RAM    : origin = 0x049000, length = 0x000800
//    CANB_MSG_RAM    : origin = 0x04B000, length = 0x000800

// End - Not used
}

SECTIONS
{
    // Code start entry point
    codestart   : > BEGIN, PAGE = 0

    // Initialized C global variables at startup
    .cinit      : > RAMM0, PAGE = 0

    // Stdio buffer
    .cio        : > RAMLS2, PAGE = 0

    // Initialized non-const global data
    .data       : > RAMGS4, PAGE = 1

    // Reserve space for unintiliazed variables
    .ebss       : > RAMLS5, PAGE = 1

    // Initialized const objects
    .econst     : > RAMLS5, PAGE = 1

    // Dynamic memory allocation
    .esysmem    : > RAMLS5, PAGE = 1

    // C++ startup constructor tables
    .pinit      : > RAMM0, PAGE = 0

    // Reset
    .reset      : > RESET, PAGE = 0, TYPE = DSECT // not used

    // Function call stack, cio (printf) requires a larger stack
    .stack      : > RAMGS2, PAGE = 1

    // Jump tables for switch statements
    .switch     : > RAMM0, PAGE = 0

    // Executable code
    .text       : >> RAMM0 | RAMD0 | RAMLS0 | RAMLS1, PAGE = 0

// Not used or deprecated

    // Boot-time copy tables (.binit)
    // Uninitialized global variables (.bss)
    // Initialized global variables (.const)

// End - Not used or deprecated

#ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,   PAGE = 0
   #else
    ramfuncs    : > RAMM0,      PAGE = 0
   #endif
#endif

}

//===========================================================================
//    End of file.
//===========================================================================

  • 0 in reply to Graham Reitz29
    TI__Guru**** 232880 points

    The problem is you never use the options -stack or -heap.  Neither option appears in the linker invocation.  You attach the linker command file F2837xD_RAM_CPU1.txt.  It has neither option in it.  Your linker invocation never refers to this file anyway.  It refers to these two linker command files:

    Graham Reitz29 said:
    -lC_Motive_2837xD_RAM_CPU1.cmd -lF2837xD_Headers_nonBIOS_cpu1.cmd 

    The first one I don't have, but it almost certainly does not contain -stack or -heap.  I looked at F2837xD_Headers_nonBIOS_cpu1.cmd from my installation of controlSUITE, and verified it does not have -stack or -heap.

    Given that you wisely use the option --warn_sections, the only way to avoid these diagnostics is to add the options -stack and -heap to the linker invocation.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Intellectual 960 points

    Previously, I attempted to manually remove some of the information and missed a few items in the linker invocation.   That's the reason for the file name mismatch.  The *.cmd file is definitely getting used.    The information has been posted to this response untouched.

    An image of the Memory Allocation View is attached.  It's clear that the linker is selectively ignoring the .stack and .esysmem sections.  They should have 8,192 bytes allocated.  Instead only 4,906 (0x400) the default is available.  Though, interestingly, it is allocated to the correct area of RAM.  Something is not working correctly.

    Also, if the -stack and -linker options are added they will override what's in the *.cmd file, correct?  That isn't desirable.

    Invoking: C2000 Linker

    "/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/bin/cl2000" -v28 -ml -mt --cla_support=cla1 --float_support=fpu32 --tmu_support=tmu0 --vcu_support=vcu2 --advice:performance=all --define=CPU1 -g --c99 --diag_warning=225 --diag_wrap=off --display_error_number --issue_remarks --verbose_diagnostics -z -m"C-Motive.map" --warn_sections -i"/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/lib" -i"/Applications/ti/ccsv7/tools/compiler/ti-cgt-c2000_17.6.0.STS/include" -i"/Users/grahamreitz/ccs/F828379D_Workspace/C-Motive" -i"/Applications/ti/c2000/C2000Ware_1_00_01_00/device_support/f2837xd/headers/cmd" --reread_libs --diag_wrap=off --display_error_number --issue_remarks --verbose_diagnostics --xml_link_info="C-Motive_linkInfo.xml" --rom_model -o "C-Motive.out" "./F2837xD_CodeStartBranch.obj" "./F2837xD_DefaultISR.obj" "./F2837xD_GlobalVariableDefs.obj" "./F2837xD_Gpio.obj" "./F2837xD_Ipc.obj" "./F2837xD_PieCtrl.obj" "./F2837xD_PieVect.obj" "./F2837xD_Spi.obj" "./F2837xD_SysCtrl.obj" "./F2837xD_usDelay.obj" "./main.obj"  -lrts2800_fpu32.lib -lC_Motive_2837xD_RAM_CPU1.cmd -lF2837xD_Headers_nonBIOS_cpu1.cmd

    <Linking>

    warning #10210-D: creating ".stack" section with default size of 0x400; use the -stack option to change the default size

    warning #10210-D: creating ".esysmem" section with default size of 0x400; use the -heap option to change the default size

    Finished building target: C-Motive.out

    **** Build Finished ****

    Kindly,

    Graham

    5531.C_Motive_2837xD_RAM_CPU1.txt 
    MEMORY
{

PAGE 0 :    // Program memory

    // BEGIN is used for the "boot to SARAM" bootloader mode
    BEGIN       : origin = 0x000000, length = 0x000002

    // RAMMx is MCU dedicated, 2048 bytes each, 4096 total
    RAMM0       : origin = 0x000122, length = 0x0002DE  // .cinit

    // RAMDx is MCU dedicated, 4096 bytes each, 8192 total
    RAMD0       : origin = 0x00B000, length = 0x000800

    // Reserved for program space, 24,576 bytes
    RAMLS0toLS5 : origin = 0x008000, length = 0x003000  // .text

    // RAMGSn Globaly shared between MCUs, 8192 bytes each, 131,072 total
    RAMGS0toGS1 : origin = 0x00C000, length = 0x002000  // .cio
    RAMGS2toGS3 : origin = 0x00E000, length = 0x002000  // .pinit
    RAMGS4      : origin = 0x010000, length = 0x001000  // .switch

    // Reset
    RESET       : origin = 0x3FFFC0, length = 0x000002

    // On-chip flash sectors
    FLASHA      : origin = 0x080000, length = 0x002000
    FLASHB      : origin = 0x082000, length = 0x002000
    FLASHC      : origin = 0x084000, length = 0x002000
    FLASHD      : origin = 0x086000, length = 0x002000
    FLASHE      : origin = 0x088000, length = 0x002000
    FLASHF      : origin = 0x090000, length = 0x002000
    FLASHG      : origin = 0x098000, length = 0x002000
    FLASHH      : origin = 0x0A0000, length = 0x002000
    FLASHI      : origin = 0x0A8000, length = 0x002000
    FLASHJ      : origin = 0x0B0000, length = 0x002000
    FLASHK      : origin = 0x0B8000, length = 0x002000
    FLASHL      : origin = 0x0BA000, length = 0x002000
    FLASHM      : origin = 0x0BC000, length = 0x002000
    FLASHN      : origin = 0x0BE000, length = 0x002000

PAGE 1 :    // Data memory

    // Part of M0, BOOT rom will use this for the stack
    BOOT_RSVD   : origin = 0x000002, length = 0x000120

    // RAMMx is MCU dedicated, 2048 bytes each, 4096 total
    RAMM1       : origin = 0x000400, length = 0x000400  // available

    // RAMDx is MCU dedicated, 4096 bytes each, 8192 total
    RAMD1       : origin = 0x00B800, length = 0x000800  // available

    // RAMGSn Globaly shared between MCUs, 8192 bytes each, 131,072 total
    RAMGS5toGS6     : origin = 0x011000, length = 0x002000  // .data
    RAMGS7toGS8     : origin = 0x013000, length = 0x002000  // .ebss
    RAMGS9toGS10    : origin = 0x015000, length = 0x002000  // .econst
    RAMGS11toGS12   : origin = 0x017000, length = 0x002000  // .esysmem
    RAMGS13toGS14   : origin = 0x019000, length = 0x001000  // .stack

    // MCU shared
    CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400  // available
    CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400  // available
}

SECTIONS
{
    // Code start entry point
    codestart   : > BEGIN, PAGE = 0

    // Initialized C global variables at startup
    .cinit      : > RAMM0, PAGE = 0

    // Stdio buffer
    .cio        : > RAMGS0toGS1, PAGE = 0

    // C++ startup constructor tables
    .pinit      : > RAMGS2toGS3, PAGE = 0

    // Reset
    .reset      : > RESET, PAGE = 0, TYPE = DSECT // not used

    // Jump tables for switch statements
    .switch     : > RAMGS4, PAGE = 0

    // Executable code
    .text       : > RAMLS0toLS5, PAGE = 0

    // Initialized non-const global data
    .data       : > RAMGS5toGS6, PAGE = 1

    // Reserve space for unintiliazed variables
    .ebss       : > RAMGS7toGS8, PAGE = 1

    // Initialized const objects
    .econst     : > RAMGS9toGS10, PAGE = 1

    // Dynamic memory allocation
    .esysmem    : > RAMGS11toGS12, PAGE = 1

    // Function call stack, cio (printf) requires a larger stack
    .stack      : > RAMGS13toGS14, PAGE = 1

#ifdef __TI_COMPILER_VERSION__
    #if __TI_COMPILER_VERSION__ >= 15009000
    .TI.ramfunc : {} > RAMM0,   PAGE = 0
   #else
    ramfuncs    : > RAMM0,      PAGE = 0
   #endif
#endif

}

// Memory ranges for reference

    // RAMLSx can be shared with CLA via MSEL_LSx bit field, 4096 bytes each, 24,576 total
/*
    RAMLS0      : origin = 0x008000, length = 0x000800
    RAMLS1      : origin = 0x008800, length = 0x000800
    RAMLS2      : origin = 0x009000, length = 0x000800
    RAMLS3      : origin = 0x009800, length = 0x000800
    RAMLS4      : origin = 0x00A000, length = 0x000800
    RAMLS5      : origin = 0x00A800, length = 0x000800
*/

    // RAMGSn Globaly shared between MCUs, 8192 bytes each, 131,072 total
/*
    RAMGS0      : origin = 0x00C000, length = 0x001000
    RAMGS1      : origin = 0x00D000, length = 0x001000
    RAMGS2      : origin = 0x00E000, length = 0x001000
    RAMGS3      : origin = 0x00F000, length = 0x001000
    RAMGS4      : origin = 0x010000, length = 0x001000
    RAMGS5      : origin = 0x011000, length = 0x001000
    RAMGS6      : origin = 0x012000, length = 0x001000
    RAMGS7      : origin = 0x013000, length = 0x001000
    RAMGS8      : origin = 0x014000, length = 0x001000
    RAMGS9      : origin = 0x015000, length = 0x001000
    RAMGS10     : origin = 0x016000, length = 0x001000
    RAMGS11     : origin = 0x017000, length = 0x001000
    RAMGS12     : origin = 0x018000, length = 0x001000
    RAMGS13     : origin = 0x019000, length = 0x001000
    RAMGS14     : origin = 0x01A000, length = 0x001000
    RAMGS15     : origin = 0x01B000, length = 0x001000
*/

    // CAN messaging
/*
      CANA_MSG_RAM    : origin = 0x049000, length = 0x000800
      CANB_MSG_RAM    : origin = 0x04B000, length = 0x000800
*/

// Not used or deprecated - Page 0

    // Boot-time copy tables (.binit)
    // Uninitialized global variables (.bss)
    // Initialized global variables (.const)

// End - Not used or deprecated - Page 0

// Not used - Page 1

    // Vector table
//    PIEVECTTABLE    :origin = 0x000D00, length = 0x000200

    // CLA messaging
//    CLA1_MSGRAMLOW  : origin = 0x001480, length = 0x000080
//    CLA1_MSGRAMHIGH : origin = 0x001500, length = 0x000080

    // UP RX/TX messaging
//    UPPTXMSG        : origin = 0x006C00, length = 0x000200
//    UPPRXMSG        : origin = 0x006E00, length = 0x000200

    // Secure ROM
//    SECUREROM   :origin = 0x3F0000, length = 0x008000

    // Boot ROM
//    BOOTROM     :origin = 0x3F8000, length = 0x007FC0

// End - Not used - Page 1

//===========================================================================
//    End of file.
//===========================================================================

  • 0 in reply to George Mock
    Intellectual 960 points

    See follow-up response above.

  • 0 in reply to Graham Reitz29
    TI__Guru**** 232880 points

    Graham Reitz29 said:
    Also, if the -stack and -linker options are added they will override what's in the *.cmd file, correct?

    Incorrect.  This line from C_Motive_2837xD_RAM_CPU1.cmd ...

        .stack      : > RAMGS13toGS14, PAGE = 1

    ... says where the stack goes.  But it does not say how big the stack is.  That's what the option -stack does.  It is a similar thing for the heap.

    Please add the appropriate -stack and -heap options.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Intellectual 960 points

    Great! Thanks George.

    I believe in a previous thread one of the moderators answered my -stack and -heap behavior incorrectly.  See the second to last post in the thread.


    Kindly,
    Graham

  • 0 in reply to Graham Reitz29
    TI__Guru**** 232880 points

    Graham Reitz29 said:
    I believe in a previous thread one of the moderators answered my -stack and -heap behavior incorrectly.

    I think it is more accurate to say he failed to consider one possible case.  The case he had in mind is, if you specify a -stack option in your project settings and in your linker command file, the one in your linker command file takes precedence.  To be even more specific: Whichever one the linker sees last is the one that is used.  Unless unusual steps are taken, CCS puts a linker command file at or near the end of the linker invocation.  The case that went unconsidered: When -stack is not specified at all.

    Thanks and regards,

    -George