• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 54 subscribers
  • Views 844 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/MSP430FW423: redundant instruction inserted by compiler

Piotr Romaniuk
Expert 2550 points
Part Number: MSP430FW423

Tool/software: TI C/C++ Compiler

Hi,

During optimization I was browsed code generated by the compiler. I saw the sequence:

    some_function( uint16_t arg ):

MOV.W   R12, R15

SWPB    R12

MOV.B    R12, R12  <<<< ???

Why is that MOV inserted by compiler?

I suspected that it is some workaround for silicon error [?].

Regards,
Piotr

  • 0
    TI__Guru**** 232670 points

    Piotr Romaniuk said:
    Why is that MOV inserted by compiler?

    I'm not sure.  It might be that the compiler incorrectly emitted the extra MOV.B.  Please submit a test case as described in the article How to Submit a Compiler Test Case. I'll submit a performance bug against the compiler, and we'll see what comes of it.

    Thanks and regards,

    -George

  • 0
    Guru 92251 points

    Piotr Romaniuk said:

    SWPB    R12

    MOV.B    R12, R12  <<<< ???

    Why is that MOV inserted by compiler?

    Since it is a MOV.B instruction I think it has the effect of clearing the high byte in the R12 register. Given that the previous instruction is SWPB R12 which swaps the the high and low bytes in R12, the combination of SWPB R12 and MOV.B R12, R12 may be part of code which right shifts (>>) an unsigned 16 bit value by 8 bits.

  • 0 in reply to Chester Gillon
    Guru 92251 points

    Chester Gillon said:
    Given that the previous instruction is SWPB R12 which swaps the the high and low bytes in R12, the combination of SWPB R12 and MOV.B R12, R12 may be part of code which right shifts (>>) an unsigned 16 bit value by 8 bits.

    When MSP430 compiler v16.9.6 was used to compile the following function at optimisation level zero (register optimizations):

    uint16_t right_shift (const uint16_t in)
{
    return in >> 8;
}

    The generated assembler performed the right shift of 8 bits using SWPB r12 and MOV.B r12,r12 instructions:

    ;*****************************************************************************
;* FUNCTION NAME: right_shift                                                *
;*                                                                           *
;*   Regs Modified     : SP,SR,r12                                           *
;*   Regs Used         : SP,SR,r12                                           *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                   *
;*****************************************************************************
right_shift:
;* --------------------------------------------------------------------------*
	.dwcfi	cfa_offset, 2
	.dwcfi	save_reg_to_mem, 16, -2
	.dwpsn	file "../MSP430FW423_right_shift_main.c",line 12,column 5,is_stmt,isa 0
        SWPB      r12                   ; [] |12| 
        MOV.B     r12,r12               ; [] |12| 
	.dwpsn	file "../MSP430FW423_right_shift_main.c",line 13,column 1,is_stmt,isa 0
$C$DW$3	.dwtag  DW_TAG_TI_branch
	.dwattr $C$DW$3, DW_AT_low_pc(0x00)
	.dwattr $C$DW$3, DW_AT_TI_return

        RET       ; [] 
        ; []

    Therefore, the MOV.B r12,r12 instruction is required, and not redundant.

  • 0 in reply to Chester Gillon
    Expert 2550 points
    Thank you Chester for explanation.
    I have missunderstood .B instructions, I thought that they only processed low byte of the register and did not touch high byte.
    As you pointed out they clear high byte.

    Regards,
    Piotr