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Compiler/AM5728: Two linker files

Part Number: AM5728
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI C/C++ Compiler

In the DSP/BIOS section 2.4.1.1 it states how the tool generates a linker.cmd file, but if we wish a user linker command file the C/C++ compiler/linker will use just one.

How do I tell it to use just my linker command file, and how does this impact DSP/BIOS?  Does DSP/BIOS demand that I have any particular names for the memory or sections?

The error message I'm getting is:

"configPkg/linker.cmd", line 28: error #10264: L2SRAM memory range overlaps existing memory range IRAM_MEM
"configPkg/linker.cmd", line 29: error #10263: OCMC_RAM1 memory range has already been specified
"configPkg/linker.cmd", line 29: error #10264: OCMC_RAM1 memory range overlaps existing memory range OCMC_RAM1
"configPkg/linker.cmd", line 30: error #10263: OCMC_RAM2 memory range has already been specified
"configPkg/linker.cmd", line 30: error #10264: OCMC_RAM2 memory range overlaps existing memory range OCMC_RAM2
"configPkg/linker.cmd", line 31: error #10263: OCMC_RAM3 memory range has already been specified
"configPkg/linker.cmd", line 31: error #10264: OCMC_RAM3 memory range overlaps existing memory range OCMC_RAM3
"configPkg/linker.cmd", line 32: error #10264: EXT_RAM memory range overlaps existing memory range DDR0

which completely makes sense since there are two *.cmd files, and the memories do overlap.

Since the DSP/BIOS linker.cmd file is autogenerated, how do I 'disable' its use, and how can I be sure my application.cmd linker command file will be appropriate for the DSP/BIOS generated code?

  • Hi Rob,

    You can exclude the auto-generated linker file by checking the following box in the .tcf file:

    What CCS and DSP/BIOS are you using?

    Todd

  •  Thanks very much.  Using this concept, I was able to find the relevant section using the XGCONF tool to add my one named section.

    however one question came up about using two linker files?  Is it possible to have two *.cmd files at any time?  what restrictions/requirements would there be to have two simultaneously?

    In the version of SYS/BIOS I'm using (AM5728x development kit) I didn't see an option to disable the *.cmd file like you show above. It does list linker command file to use as base and sets it to null, but I didn't see a 'disable' the SYS/BIOS generated linker cmd file.

    Thanks.

  • Hi Rob,

    Sorry for the slow response. I've been out of the office. Are you using DSP/BIOS or SYS/BIOS? You started asking about DSP/BIOS, but the above pic is SYS/BIOS.

    Todd
  • I apologize for my inaccurate use of DSP/BIOS vs SYS/BIOS.

    I am unfamiliar with your offerings in this area.  I believe I am using SYS/BIOS, as that is what I'm told ships with your AM5728 EVM package that I downloaded.

    So sorry if I mislead the answer.

    I click on SYS/BIOS V 6.52.0.12 when I create the project in the Products and repositories selection dialog.

  • Thanks for the clarification. You can have multiple linker files with SYS/BIOS. I'm going to move your thread to the processors forum since they probably have recommendations on how to set things up in the linker file(s).

    Todd
  • Rob,

    You mentioned you used Processor SDK RTOS for AM572x, those driver examples are SYSBIOS based and the linker command file is generated automatically. Why you need to create you own linker command file? You can use Program.sectMap in .cfg file to place different code sections in different memory location. Also, you can create your own platform.

    Regards, Eric
  • I found where to tell code composer where the configure.bld file is and it generates the below linker file.

    I also added :dsp1 to the package configuration. What does :dsp1 mean? I mean I just literally added it to the platform name which in my case is ti.platforms.evmAM572x:dsp1

    is the dsp1 some sort of extension/option?


    -l"C:\Users\rob.barton\ti\workspace_v7\DSP1\Debug\configPkg\package\cfg\app_pe66.oe66"
    -l"C:\Users\rob.barton\ti\workspace_v7\DSP1\src\ipc\ipc.ae66"
    -l"C:\Users\rob.barton\ti\workspace_v7\DSP1\src\utils\utils.ae66"
    -l"C:\Users\rob.barton\ti\workspace_v7\DSP1\src\sysbios\sysbios.ae66"
    -l"C:\ti\bios_6_52_00_12\packages\ti\targets\rts6000\lib\ti.targets.rts6000.ae66"
    -l"C:\ti\bios_6_52_00_12\packages\ti\targets\rts6000\lib\boot.ae66"

    --retain="*(xdc.meta)"


    --args 0x0
    -heap 0x0
    -stack 0x2000

    MEMORY
    {
    L2SRAM (RWX) : org = 0x800000, len = 0x20000
    OCMC_RAM1 (RWX) : org = 0x40300000, len = 0x80000
    OCMC_RAM2 (RWX) : org = 0x40400000, len = 0x100000
    OCMC_RAM3 (RWX) : org = 0x40500000, len = 0x100000
    DSP1_PROG (RWX) : org = 0x8c000000, len = 0x1000000
    SR_0 (RW) : org = 0x8e000000, len = 0x1000000
    }

    ti_sysbios_family_c66_Cache_l1dSize = 32768;
    ti_sysbios_family_c66_Cache_l1pSize = 32768;
    ti_sysbios_family_c66_Cache_l2Size = 131072;

    SECTIONS
    {

    ti_sdo_ipc_init: load > DSP1_PROG, type = NOINIT
    }

    xdc_runtime_Startup__EXECFXN__C = 1;
    xdc_runtime_Startup__RESETFXN__C = 1;

    SECTIONS
    {
    .text: load >> DSP1_PROG
    .ti.decompress: load > DSP1_PROG
    .stack: load > DSP1_PROG
    GROUP: load > DSP1_PROG
    {
    .bss:
    .neardata:
    .rodata:
    }
    .cinit: load > DSP1_PROG
    .pinit: load >> DSP1_PROG
    .init_array: load > DSP1_PROG
    .const: load >> DSP1_PROG
    .data: load >> DSP1_PROG
    .fardata: load >> DSP1_PROG
    .switch: load >> DSP1_PROG
    .sysmem: load > DSP1_PROG
    .far: load >> DSP1_PROG
    .args: load > DSP1_PROG align = 0x4, fill = 0 {_argsize = 0x0; }
    .cio: load >> DSP1_PROG
    .ti.handler_table: load > DSP1_PROG
    .c6xabi.exidx: load > DSP1_PROG
    .c6xabi.extab: load >> DSP1_PROG
    MatrixMemory: load > L2SRAM align = 0x4
    .vecs: load > DSP1_PROG
    xdc.meta: load > DSP1_PROG, type = COPY

    }


    As you can see it generates the SR_0 memory section, but it doesn't put anything into this section. In my mind I should see itleast one section that has > SR_0 that the IPC code could access.

    The IPC start still fails...

    Is there anywhere that outlines what 'setup' is required to use the IPC module?

    Thanks.
  • Rob Barton said:


    I also added :dsp1 to the package configuration. What does :dsp1 mean? I mean I just literally added it to the platform name which in my case is ti.platforms.evmAM572x:dsp1

    If you look at the config.bld file supplied in the messageq example you will see dsp1 defined there: 

    Build.platformTable["ti.platforms.evmDRA7XX:dsp1"] = {
        externalMemoryMap: [
            [ "DSP1_PROG", {
                name: "DSP1_PROG", space: "code/data", access: "RWX",
                base: 0x8C000000, len: 0x1000000,
                comment: "DSP1 Program Memory (16 MB)"
            }],
            [ "SR_0", SR_0 ]
        ],
        codeMemory:  "DSP1_PROG",
        dataMemory:  "DSP1_PROG",
        stackMemory: "DSP1_PROG",
        l1DMode: "32k",
        l1PMode: "32k",
        l2Mode: "128k"
    };

    But I am confused as to why ti.platforms.evmAM572x:dsp1 worked for you, since you can see it's defined as ti.platforms.evmDRA7XX:dsp1. (In case you are wondering, DRA7XX is our automotive equivalent part).

    I should also mention that you don't have to use a config.bld file, in which case CCS will use the platform definitions defined in  ~\bios_6_52_00_12\packages\ti\platforms\evmAM572X\platform.xdc

    But if you want to make any changes to the platform definitions in platform.xdc file you will need to rebuild the rtsc library, which is why we prefer to use the config.bld file since it's on the application level. 

    We can continue IPC related discussions in the following thread,