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Compiler: TI arm linker ALIAS keyword and section's address

Tool/software: TI C/C++ Compiler

Hello,

I am currently using TI 16.9.2.LTS tools version (for the M4 IPU cores on the TDA2xx). The manual i got with the link in TI's site to this version is written for version 18.1.0.LTS so i assume the syntax is the same as for my version.

According to the manual the ALIAS keyword should enable me define two different addresses spaces (with the same length), each of them can be used an any other memory but the linker will know that both actually refer to the same space - which is great when able to accesses the same physical memory from different addresses.

The problem is that when i tried it o keep getting errors saying i can only use the memory as a run address and it seems i also need a separate load addresses - and it does not let me use each of these memory as any other memory (for example if i am defining two memory regions without the alias there is no problem). so either i don't understand how the alias is supposed to be used and exactly for what purposes or this is some sore of a bug - I will appreciate your help ..

another issue i have encountered is that i can not give as a section's binding address an expression like (0x1000 + 5) even though it is a constant and i can only enter actual numbers. why is that? 

Thanks

Guy 

  • Regarding the ALIAS problem ... Please show an example.  Be sure to include the exact text of the error message.

    Guy Mardiks said:
    i can not give as a section's binding address an expression like (0x1000 + 5) even though it is a constant and i can only enter actual numbers. why is that? 

    It is a limitation on the parsing capability of the linker.  In some contexts, like a value assigned to symbol, expressions are allowed.  In other contexts, only well defined constants are allowed.

    Thanks and regards,

    -George

  • ALIAS example and errors:

    MEMORY

    {

    ALIAS

    {

             MEM1 (RWIX): org = (0)

             MEM3 (RWIX): org = (0x55020000)

       } len = (0x4000)

    }

    SECTIONS

    {

       GROUP (GROUP1)

       {

        .sec_group1 : {}

       } >  MEM1

       .another_sec : {} > MEM1

    }

    The Errors:

    error #10433-D: ALIAS'ed memory range, MEM1, may only be used for run placement and not for load placement for "GROUP1".

    error #10433-D: ALIAS'ed memory range, MEM1, may only be used for run placement and not for load placement for ".another_sec".

    If  removing the ALIAS there are no issues.

    Thanks

    Guy

  • Thank you for the example.  I can reproduce the same diagnostics.  I don't know why it happened.  So, I filed CODEGEN-4699 in the SDOWP system to have this investigated.  You are welcome to follow it with the SDOWP link below in my signature.

    Thanks and regards,

    -George

  • Guy,

    The linker ALIAS feature is intended for use with the Cortex-M4's SRAM mapping feature where the on-chip SRAM is mapped from both the SRAM memory region to the CODE memory region.  This is due to the device's separate instruction and data buses.

    The use case supported is for running functions from RAM.  ie for performance reasons.

    It requires that you use copy tables to load code to the alias'ed region.  The linker then ensures during placement that any placements to SRAM_DATA do not collide with those used to load code for SRAM_CODE.

    Please see below example:

    //task1.c
    #include <stdio.h>
    void toggle(void)
    { printf("alias placement succeeded for ramfunc toggle\n"); }

    //main.c
    #include <cpy_tbl.h>
    extern void toggle();
    void main(void)
    {
        extern COPY_TABLE _task1_copy_table;
        copy_in(&_task1_copy_table);
        toggle();
    }


    MEMORY
    {
        MAIN       (RX) : origin = 0x00000020, length = 0x0000FFFF
        ALIAS
        {
           SRAM_CODE  (RWX): origin = 0x00030000
           SRAM_DATA  (RW) : origin = 0x00040000
        } length = 0x0000F000
    }
    SECTIONS
    {
        GROUP
        {
           .task1: { task1.obj(.text) }
        } load = MAIN, run = SRAM_CODE, table(_task1_copy_table)
        .text   :   > MAIN
        .const  :   > MAIN
        .cinit  :   > MAIN
        .pinit  :   > MAIN
        .data   :   > 0x00040000
        .bss    :   > SRAM_DATA
        .sysmem :   > SRAM_DATA
        .stack  :   > SRAM_DATA (HIGH)
    }

    Thanks and Regards,
    Greg

  • Hello, Thanks.
    I might be misunderstanding something as it does not feel very useful - cant i do the same by just allocate DATA and CODE to the same region and you'll have no problems of collisions. if you want different names for data and CODE you can just define another name as the one define on MEMORY (which will be similar to gnu MEM_ALIAS)
    i would have thought it would enable to actually define different regions which each can be used separately but the linker will know they are the same physical space: i.e for M4 since the RAM region is NX , there is need to use the AMMU to map it to an executable region so after AMMU you'll have two different regions that are the same space - it would have been useful if the ALIAS would have helped with that.

    Thanks for letting me know that it does no function as i thought (and as could be understood from the document).
    maybe you'll consider to update this feature so it will be as it sounds.

    Regards
    Guy