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  • TI Thinks Resolved

TINA/Spice/TPS53667: Simulation Error and Extra Pins on Model

Part Number: TPS53667

Tool/software: TINA-TI or Spice Models

So if I were to setup this TPS53667 to work with a CSD95490Q5MC, is there an example how to do that?  Do I need to be exercising the CLK pin to get the model to work eventhough I'm not using that in the application?

  • Hi Kerry
    The CLK pin will only be needed if you want to dynamically change the VOUT and use the CMDDATA0_7 pins to pass a voltage value and it will be taken when the CLK is asserted. Although the CMDDATA is not really present on the IC, it is used to represent the case if the VOUT hexa value is fed through serial interface to update the value of the VOUT target. You may simply connect the CLK to gnd and this is will not be activated.
    Thanks
    Ranjani
  • In reply to ranjanir:

    Thank you. I grounded the CLK pin but I still get an error when I run the sim. Error is "u1:_u9_u20:gq: Unknown circuit node: "nc_08" requested in behavioral source.
  • In reply to Kerry Tracey:

    Hi Kerry

    Can you tell me which simulator are you running the model in and can you share your schematic with me?

    Thanks

    Ranjani

  • In reply to ranjanir:

    'm running .tran 1m startup.  I'm using LTSpice XVII. 

  • In reply to Kerry Tracey:

    Kerry

    Are you using the encrypted model or the unencrypted model for the TPS53667 and the CSD FET part? Both of these are encrypted in the product folders in PSPICE so you cannot directly import it into any other SPICE based simulators unless you use the unencrypted models. You will need to contact your local sales representative to request the unencrypted models.

    Thanks

    Ranjani

  • In reply to ranjanir:

    I am using the unencrypted models that I got from Russell.
  • In reply to Kerry Tracey:

    I also did try simplifying the schematic and modeling a single part but still got errors. A couple of experienced designers looked at the schematic here and said they couldn't find any errors (excluding the Sim error). I think the design is pretty much what the datasheet shows so I'm not sure why it won't work.
  • In reply to Kerry Tracey:

    Hi Kerry
    Looking at the internal model, the U1._U9_U20: gq is used internally as a current source that drives a SRLATCH and the node should be clamped by the use of an internal diode which is taken from the definition in the .lib file. I am not sure if LTSPICE needs this diode to be defined locally in the SRLATCH as well which will allow the node to be within acceptable voltage values. Worth a shot. I will resend the files to Russell and you can let me know if that has helped your issue.
    Thanks
    Ranjani
  • In reply to ranjanir:

    I loaded in the new .lib file and still get an error when I run the simulation.  Error is u1:_u9_U20:1:e_abmgate1: Unknow circuit node. "nc_16" requested in behavioral source  

  • In reply to Kerry Tracey:

    Hi Kerry

    I tried to probe some more nodes in PSPICE model and could not find anything which might cause a problem and unfortunately cannot check each internal node in LTSPICE as we do not support external simulators. Given below is the setup and simulation in PSPICE, it would be helpful if you could try matching up the test case or even running in the same tool.

    Test setup in OrCAD:

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