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Erroneos simulation of SN74HCT74 CLEAR PRESET pins

Marina Iriarte
Prodigy 90 points
Other Parts Discussed in Thread: SN74HCT74, TINA-TI

hi, 

I am simulating an schematic with SN74HCT74 flip-flop. I am only using Clear, Preset and Output pins. I want to simulate the situation that I mark in red color in the following image:

The problem is that I don't see a high value in the output. I attach the simulation file in case it helsp.

Thanks, 

Marina.

Prueba_FlipFlop.TSC

  • 0
    TI__Genius 9775 points
    Marina,

    Do you remember who gave you this model? I checked on our system, we didn't seem to have this model generated by us in the past.. but anyhow, due to the nature of this request, please email support@ti.com for further support/request.

    Regards,
    Herman
  • 0 in reply to Herman Theodorus
    Prodigy 90 points

    Hi Herman, 

    I took it from Tina TI v9. I used the Find Component dialog, and the model is called:

    SN74HCY74 | Tina Macro

    I will write to support@ti.com, thanks!

    Marina.

  • 0 in reply to Marina Iriarte
    TI__Mastermind 41310 points

    Marina,

    The model is part of TINA-TI and was integrated by the DesignSoft team that produces the tool. If you notice in the datasheet, the note applied here is:

    DesignSoft explains:

    We do not model this state in the flip-flops in TINA because it is a nonstable state as it is written in the datasheet of the SN74HCT74.

    "This configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level."

    In our flip-flop model the CLR input has higher priority, so if the CLR is low the Q output is also low.