TINA/Spice: LM5022 snvmb66 UVLO pin is out of control

Lewis Cheng

Other Parts Discussed in Thread: TINA-TI, LM5022

Tool/software: TINA-TI or Spice Models

Hi ,

I get the LM5022 reference design snvm66 from website , and tried to let the UVLO pin grounding , but the OUT pin is not terminated.

over 6 years ago

0 Nikhil Gupta (Product Folder Models) over 6 years ago

TI__Mastermind 39210 points

Lewis,
Not sure what the issue is. Can you share your exact TSC file and describe the issue in more detail?

0 Lewis Cheng over 6 years ago in reply to Nikhil Gupta (Product Folder Models)

Prodigy 80 points

Hi Nikhil,

It's a LM5022 snvmb66 reference design download from website

snvmb66.tsc

0 Nikhil Gupta (Product Folder Models) over 6 years ago in reply to Lewis Cheng

TI__Mastermind 39210 points

Lewis,

Are you seeing the issue in the test bench from the TI product folder "as is" or after making changes to the schematic? If you have made changes to the schematic, can you upload your exact TSC file. Also, can you please add an image of what you mean by "but the OUT pin is not terminated"?

0 Lewis Cheng over 6 years ago in reply to Lewis Cheng

Prodigy 80 points

Base on the LM5022 IC spec. , whwn UVLO pin voltage falls below the 1.25V threshold the current source is turned off,

and then OUT pin will be terminated.

But i let the UVLO pin direct to ground the output still working.

simulation.docx

thanks

Lewis

0 Nikhil Gupta (Product Folder Models) over 6 years ago in reply to Lewis Cheng

TI__Mastermind 39210 points

HI Lewis,

I was able to reproduce this error. We will have a look at it and get back to you.

0 Arpan Gupta over 6 years ago in reply to Nikhil Gupta (Product Folder Models)

TI__Expert 3140 points

Hi Lewis,

We have made a change in the model to implement UVLO functionality properly.

LM5022_TRANS_FLYBACK.TSCPFA the updated LM5022 TINA-TI model. Let us know if you face any other issue.

Thanks & Regards,

Arpan Gupta

0 Lewis Cheng over 6 years ago in reply to Arpan Gupta

Prodigy 80 points

Hi Arpan ,

I have a another question,

I would like to adjust the soft start time with SS pin external capacitor .

But it seems that no matter what the value giving the soft start time is constant.

Thanks & Regards,

Lewis

0 Arpan Gupta over 6 years ago in reply to Lewis Cheng

TI__Expert 3140 points

Hi Lewis,

I will check and get back to you.

Thanks & Regards,

Arpan Gupta

0 Arpan Gupta over 6 years ago in reply to Lewis Cheng

TI__Expert 3140 points

Hi Lewis,

The internal error amplifier of LM5022 is disabled for flyback test setup (as FB pin is connected to GND). Hence, soft-start feature is not applicable for this test setup.

Thanks & Regards,

Arpan Gupta

0 Lewis Cheng over 6 years ago in reply to Arpan Gupta

Prodigy 80 points

Hi Arpan ,

Continue the previous problem ,

when FB pin is connected to GND , the SS pin is disabled , In this setup have any SPEC or data can confirm the rise time(constant).

Another question,

To consider PSU parallel operation , I have to set the start-up(turn-on delay time + rise time) time about 200ms , with Vcc pin external capacitor(turn-on delay time)

Have any formula can predict this section?

Thanks&Regards

Lewis Cheng

0 Garrett Roecker over 6 years ago in reply to Lewis Cheng

TI__Mastermind 21720 points

Hi Lewis,

If you would like t soft-start for a flyback configuration it is possible to implement this discretely. Usually this is easier to implement on the isolated side controlling the rise time of the feedback node. This application note give some idea on how to implement soft start discretely. Figure 1 could be implemented on the R14 and R19 of the provided schematic.

The rise time of the VCC pin should be relatively small compared to the desired soft-start time of 200ms.

Thanks,

Garrett

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TINA/Spice: LM5022 snvmb66 UVLO pin is out of control