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TINA/Spice/TPS2490: Spice model is not consistent with the datasheet

Part Number: TPS2490
Other Parts Discussed in Thread: TINA-TI,

Tool/software: TINA-TI or Spice Models

I am simulation TPS2490 spice model in PSpice. I do not need the timer and I want to short the timer pin to the ground (as it is mentioned in the datasheet)/ However, in the simulation I see that if the current trips, the gate voltage remains at a high voltage and it truns on the mosfet. I set up the simulation such that the load curretn ramps up and at some point the hot swap hits the current limit and the output voltage drops immediately. However, I can see the Vgs of the FET is not zero. This is only happening when I short the timer to the ground.

Thanks in advance

  • Hello

    We have simulated the same test condition as you described and see the same issue of VGATE not going to 0. This is because the fault condition is not modeled in this case as the timer is the one setting the fault which never happens when TIMER=0V. We are looking to see if we can force the pull down of the GATE and will get back to you shortly.

    Thanks

    Ranjani

  • Ranjani,

    Thank you for your clear response. I will be waiting for your answer. From you reply I understand that this is only a modeling issue? I will not see this in the experiment?

    Regards,

    --Ali

  • Hi Ali,

    Ranjani reached out to me to look into this use case and confirm the silicon behavior.
    I will configure EVM as per your use case and verify. This will take some time as I do not have this part EVM right now. I just placed EVM order and will revert to you as soon as I get it.
    In the meanwhile, please share your application use case details and system ratings. Any other questions on this device ?

    Best Regards,
    Rakesh