Part Number: DLPC410
Tool/software: Code Composer Studio
Our setup is as followed: (Virtex7, DLPC410, DLP7000)
As we have resolved the previous problem, the DLPC410's initialization and calibration go successfully, and we can also retrieve the right DMD_TYPE and VERSION. However, the control outputs somehow couldn't get to the mirror, and I'll list some of our observation below:
1. The RST_ACTIVE stays low even after we output BLK_MD = 11, BLK_AD = 1000, ROW_MD = 00, ROW_AD = 'd0, and other control signals (e.g. wdt_ena, rst2blkz, ns_flip ...) weren't toggled during the output.
2. ECP2_M_TP16 (Clock reset) stays high after initialization. We're not sure if this is normal and what causes this if it is not.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
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In reply to ykc:
In reply to Justin Chen14:
Yes, we kept DVALID high during the whole operation (>16T).
We could not fetch output ports with ILA, but we can provide our simulation. The interval between the 2 markers is 16T.
It's a steady logic low
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