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DLPC900: dlp lightcraft6500 jtag shematic question

Part Number: DLPC900

I design dlpc900 as reference lightcraft6500.

now, i have some question of lightcraft6500 schematic about jtag.

In the schematic page 11, J10(JTAG BOUNDARY SCAN PORT)  and J8(Multi-ice debug port) use TRSTZ signal. 

If J8 is not used and J10 is connected to UM232, TRSTZ signal is short to OUTPUT of U17-4(SN74AHC1G125DBVR).

I Guess that OUTPUT of U17-4 is low.  I don't understand why  TRSTZ OUTPUT PIN(AD4) OF UM232 PIN is connected to OUTPUT of U17-4(SN74AHC1G125DBVR).

Is it short????

  • Hi Jae,

    Welcome to DLP section of TI E2E community. Yes both are same signal.
    It is not recommended to connect both UM232 and arm debugger at same time.


    -ykc
  • In the lightcraft6500,  i not used arm mult port debug. I only use UM232.

    UM232 module control TRSTZ signal that is logic high 3.3V normally, also U17-4(SN74AHC1G125DBVR) control TRSTZ signal that is logic low 0V normally.

    I Connect UM232 to  lightcraft6500 evm, I have checked that TRSTZ voltage is about 2.1V. because 3.3V and 0V is short.

    why this problem is happen??, but UM232 is download bootloader well.

  • Hi Jae,

    You are correct. This is a bug in schematics but works due to limited drive strength on UM232 and SN74AHC1G125DBVR.

    SN74AHC1G125DBVR can sink 4mA. UM232 also will have limitation on drive current on GPIO.

    Customers producing their own board need to correct this circuit in their design.

    -ykc