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DLP9500: Frame rate control and pattern saving

Part Number: DLP9500
Other Parts Discussed in Thread: DLPC410, DLPC900

Dear TI forum,
I have a few questions about the DLP® DiscoveryTM 4100 Development Kit .95 1080p (VIS) with DLP9500 1080p chipset:
1) can I control the frame rate of the patterns displayed on the DMD, through software interface (Discovery 4100 Explorer)? Alternatively, in which way can I control this frame rate?
2) what is the maximum pattern rate? Based on the manual I expect it to be 23,148 Hz (1bit), 2,893 Hz (8-bit); can you please confirm?
3) How can I save on the device a set of pre-loaded patterns? When I need to re-use the same set of patterns, I would like to avoid reloading them ... is this possible?


Looking forward to hearing from you.
Best regards

Davide

  • Hello Davide,

    First, welcome to the DLP section of the TI-E2E forums.

    This platform is designed for high performance systems that want very low level control.  Out of the box the DLPC410 controller systems do not have any memory storage,  It is a binary (i.e. 1-bit patterns only).  If using the EVM you can build in the APPS_FPGA a grayscale system.  

    If you want something that does this already without writing FPGA code, you can check out offerings from some of our design partners [ http://www.ti.com/dlp-chip/advanced-light-control/optics-electronics/optics-electronics.html ].

    We also have our DLPC900 based EVMs that have memory and other features built in.  See the DLPLCR6500EVM and DLPLCR9000EVM.

    Ultimately, what are you wanting to do?  (i.e. What are your requirments?)

    Fizix

  • Dear Fizix,

    thank you for your reply!

    My main requirement is to have different global binary patterns displayed on the DMD with the highest possible Frames Per Second (intended as number of global patterns per unit time). It looks like it's not possible to change the default frame rate of pre-loaded patterns from the Discovery 4100 Explorer interface.

    Is there a way of working at high FPS (say 100 to 1000) rates from interface or do I need to program in FPGA code?

    By piloting the DMD from the Discovery 4100 interface, I have only been able to reach a frame rate of about 2 FPS. According to specs, I expect the DMD to be capable of working at a 23,148 Hz (1 bit) frame rate; does that mean that I can achieve FPS as high as 23,148 FPS? If so, how would you advise to do it?


    Looking forward to hearing from you.
    Best regards

    Davide

  • Davide,

    The USB bandwidth, is simply too slow for that kind of speed.  That is what the EXP connectors are for.  They can be used in your own custom VHDL / Verilog code in the APPS_FPGA to receive data and send it. The DMD is capable of the speed, but you will likely need assistance in building the interface.

    Or you can program patterns from an algorithm (again, your own VHDL / Verilog code) in the APPS_FGPA

    This EVM is intended as a sandbox for trying these things out, but is not an end product.

    Our design partners can help with services to help you develop hardware/software that will meet your requirments.

    Fizix

  • Dear Fizix,

    thank you for your quick reply! Following the information you provided, I have now few other questions about on the topic:

    1) Do I have to add additional hardware to my DLP Discovery 4100 platform to program the interface for my purposes? It seems to me, now, that I need an EXP connector to bypass the USB bottleneck. Do I need to buy additional hardware components? If so, can you provide me the reference to this material?

    2) Do I need additional software to program my platform? If so, how can I get it?

    3) Is there a way to obtain a source code for APPS_FPGA programming? For my experiment, I would also consider to buy developed plug-and-play software solutions.

    Best regards,

    Davide

  • Davide,

    If the binary patterns are ones that can be generated by an algorithm, then it may be possible to write APPS_FPGA code that could generate them.  Otherwise you will need to develop some kind of front end that will send the patterns that could be received over EXP.

    ViALUX (a DLP design partner makes a proprietary DLPC400 system (already has their APPS_FPGA code and some memory) that can preload a bunch of patterns into memory and run at these kind of speeds.

    Our DLPC900 based EVMs (DLPLCR6500EVM and DLPLCR9000EVM) can run with binary pattern rates up to 9.5k for pre-loaded patterns or 2.88k for video streamed patterns.

    Fizix