if we understand correctly, the AP needs two LVDS ports to connect to FPGA in order to driver 1080p. The reason is that the standard LVDS interface supports 85Mhz clock (if I understand it correctly).
The AP we may choose to use however supports only one LVDS port (with 148.5MHz clock).
I wander if it is possible for FPGA to support single LVDS with higher clock frequency (148.5MHz).
If not, how might be alternative solution? to use a 1 to 2 bridge? or we may have to use RGB interface, which is less interference free.
