This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

  • Resolved

DLPC3436: LVDS Interface on FPGA (XC7Z020- 1CLG484I4493)

Prodigy 100 points

Replies: 4

Views: 69

Part Number: DLPC3436

if we understand correctly, the AP needs two LVDS ports to connect to FPGA in order to driver 1080p. The reason is that the standard LVDS interface supports 85Mhz clock (if I understand it correctly).

The AP we may choose to use however supports only one LVDS port (with 148.5MHz clock).

I wander if it is possible for FPGA to support single LVDS with higher clock frequency (148.5MHz).

If not, how might be alternative solution? to use a 1 to 2 bridge? or we may have to use RGB interface, which is less interference free.

  • Hi Jimmy, 

    Our expert will look into your query and get back to you soon. 



    Regards,

    Mayank

  • In reply to Mayank Khandelwal:

    Jimmy,

    Apologies for the delayed response.

    There are multiple modes supported by the DLPC3436 for LVDS input. In Modes 1-6 you can use single LVDS-input, while Modes 7 and 8 require both LVDS input ports.

    There is a limitation of 1280 x 720 resolution when using single LVDS input. In order to support 1920 x 1080 resolution input you will need to use both LVDS input ports.

    I hope this helps.

    Regards,

    Philippe Dollo

    If a post answers your question, please click the "Verify Answer" button.

  • In reply to Philippe Dollo:

    Thanks Philippe

  • In reply to Jimmy song:

    No problem, Jimmy. Glad to help.

    Regards,

    Philippe Dollo

    If a post answers your question, please click the "Verify Answer" button.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.