It is a question about clear / reset control of DLPC 910 (DLPR 910 A).
Since the timing requirements of BLKMD / AD (LVCMOS 25) and DCLK are severe as shown in Fig.1, I would like to change BLKMD / AD within DVALID as shown in Fig.2.
Is there no problem?
DLPC910 DataSheet (P16)
http://www.tij.co.jp/jp/lit/ds/symlink/dlpc910.pdf
Fig.1
Fig.2